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author | Anatoly Sokolov <aesok@post.ru> | 2008-07-11 22:50:02 +0400 |
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committer | Anatoly Sokolov <aesok@gcc.gnu.org> | 2008-07-11 22:50:02 +0400 |
commit | 1cf0a7f1ccc13a311a036147e0ce890b03cd68ff (patch) | |
tree | 731db2743cb504c83f1200a7a5e2cb49848ded79 /gcc/config/avr | |
parent | eea1139b26437bb71fd5ee838d8d0b5f2473a16a (diff) | |
download | gcc-1cf0a7f1ccc13a311a036147e0ce890b03cd68ff.zip gcc-1cf0a7f1ccc13a311a036147e0ce890b03cd68ff.tar.gz gcc-1cf0a7f1ccc13a311a036147e0ce890b03cd68ff.tar.bz2 |
avr-protos.h (avr_peep2_scratch_safe): Remove prototype.
* config/avr/avr-protos.h (avr_peep2_scratch_safe): Remove prototype.
* config/avr/avr.c (avr_peep2_scratch_safe): Remove.
(avr_hard_regno_scratch_ok): New function.
(TARGET_HARD_REGNO_SCRATCH_OK): Define.
* config/avr/avr.md (all peepholes that request a scratch register):
Remove avr_peep2_scratch_safe use.
From-SVN: r137725
Diffstat (limited to 'gcc/config/avr')
-rw-r--r-- | gcc/config/avr/avr-protos.h | 1 | ||||
-rw-r--r-- | gcc/config/avr/avr.c | 31 | ||||
-rw-r--r-- | gcc/config/avr/avr.md | 27 |
3 files changed, 23 insertions, 36 deletions
diff --git a/gcc/config/avr/avr-protos.h b/gcc/config/avr/avr-protos.h index b849310..7665555 100644 --- a/gcc/config/avr/avr-protos.h +++ b/gcc/config/avr/avr-protos.h @@ -122,7 +122,6 @@ extern RTX_CODE avr_normalize_condition (RTX_CODE condition); extern int compare_eq_p (rtx insn); extern void out_shift_with_cnt (const char *template, rtx insn, rtx operands[], int *len, int t_len); -extern int avr_peep2_scratch_safe (rtx reg_rtx); #endif /* RTX_CODE */ #ifdef HAVE_MACHINE_MODES diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index 0176a2a..84625d8 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -85,6 +85,7 @@ static int avr_address_cost (rtx); static bool avr_return_in_memory (const_tree, const_tree); static struct machine_function * avr_init_machine_status (void); static rtx avr_builtin_setjmp_frame_value (void); +static bool avr_hard_regno_scratch_ok (unsigned int); /* Allocate registers from r25 to r8 for parameters for function calls. */ #define FIRST_CUM_REG 26 @@ -335,6 +336,9 @@ int avr_case_values_threshold = 30000; #undef TARGET_BUILTIN_SETJMP_FRAME_VALUE #define TARGET_BUILTIN_SETJMP_FRAME_VALUE avr_builtin_setjmp_frame_value +#undef TARGET_HARD_REGNO_SCRATCH_OK +#define TARGET_HARD_REGNO_SCRATCH_OK avr_hard_regno_scratch_ok + struct gcc_target targetm = TARGET_INITIALIZER; void @@ -5902,27 +5906,20 @@ avr_output_addr_vec_elt (FILE *stream, int value) fprintf (stream, "\trjmp .L%d\n", value); } -/* Returns 1 if SCRATCH are safe to be allocated as a scratch +/* Returns true if SCRATCH are safe to be allocated as a scratch registers (for a define_peephole2) in the current function. */ -int -avr_peep2_scratch_safe (rtx scratch) +bool +avr_hard_regno_scratch_ok (unsigned int regno) { - if ((interrupt_function_p (current_function_decl) - || signal_function_p (current_function_decl)) - && leaf_function_p ()) - { - int first_reg = true_regnum (scratch); - int last_reg = first_reg + GET_MODE_SIZE (GET_MODE (scratch)) - 1; - int reg; + /* Interrupt functions can only use registers that have already been saved + by the prologue, even if they would normally be call-clobbered. */ - for (reg = first_reg; reg <= last_reg; reg++) - { - if (!df_regs_ever_live_p (reg)) - return 0; - } - } - return 1; + if ((cfun->machine->is_interrupt || cfun->machine->is_signal) + && !df_regs_ever_live_p (regno)) + return false; + + return true; } /* Return nonzero if register OLD_REG can be renamed to register NEW_REG. */ diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 0fd37128..a6e4c3e 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -261,8 +261,7 @@ && operands[1] != constm1_rtx)" [(parallel [(set (match_dup 0) (match_dup 1)) (clobber (match_dup 2))])] - "if (!avr_peep2_scratch_safe (operands[2])) - FAIL;") + "") ;;============================================================================ ;; move word (16 bit) @@ -320,8 +319,7 @@ && operands[1] != constm1_rtx)" [(parallel [(set (match_dup 0) (match_dup 1)) (clobber (match_dup 2))])] - "if (!avr_peep2_scratch_safe (operands[2])) - FAIL;") + "") ;; '*' because it is not used in rtl generation, only in above peephole (define_insn "*reload_inhi" @@ -397,8 +395,7 @@ && operands[1] != constm1_rtx)" [(parallel [(set (match_dup 0) (match_dup 1)) (clobber (match_dup 2))])] - "if (!avr_peep2_scratch_safe (operands[2])) - FAIL;") + "") ;; '*' because it is not used in rtl generation. (define_insn "*reload_insi" @@ -1432,8 +1429,7 @@ "" [(parallel [(set (match_dup 0) (ashift:HI (match_dup 1) (match_dup 2))) (clobber (match_dup 3))])] - "if (!avr_peep2_scratch_safe (operands[3])) - FAIL;") + "") (define_insn "*ashlhi3_const" [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r") @@ -1453,8 +1449,7 @@ "" [(parallel [(set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 2))) (clobber (match_dup 3))])] - "if (!avr_peep2_scratch_safe (operands[3])) - FAIL;") + "") (define_insn "*ashlsi3_const" [(set (match_operand:SI 0 "register_operand" "=r,r,r,r") @@ -1506,8 +1501,7 @@ "" [(parallel [(set (match_dup 0) (ashiftrt:HI (match_dup 1) (match_dup 2))) (clobber (match_dup 3))])] - "if (!avr_peep2_scratch_safe (operands[3])) - FAIL;") + "") (define_insn "*ashrhi3_const" [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r") @@ -1527,8 +1521,7 @@ "" [(parallel [(set (match_dup 0) (ashiftrt:SI (match_dup 1) (match_dup 2))) (clobber (match_dup 3))])] - "if (!avr_peep2_scratch_safe (operands[3])) - FAIL;") + "") (define_insn "*ashrsi3_const" [(set (match_operand:SI 0 "register_operand" "=r,r,r,r") @@ -1580,8 +1573,7 @@ "" [(parallel [(set (match_dup 0) (lshiftrt:HI (match_dup 1) (match_dup 2))) (clobber (match_dup 3))])] - "if (!avr_peep2_scratch_safe (operands[3])) - FAIL;") + "") (define_insn "*lshrhi3_const" [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r") @@ -1601,8 +1593,7 @@ "" [(parallel [(set (match_dup 0) (lshiftrt:SI (match_dup 1) (match_dup 2))) (clobber (match_dup 3))])] - "if (!avr_peep2_scratch_safe (operands[3])) - FAIL;") + "") (define_insn "*lshrsi3_const" [(set (match_operand:SI 0 "register_operand" "=r,r,r,r") |