avr.c (avr_simplify_comparision_p, [...]): Don't use the 'U' suffix.

	* avr.c (avr_simplify_comparision_p, adjust_insn_length,
	mask_one_bit_p, output_reload_insisf): Don't use the 'U' suffix.
	* avr.h (reg_class): Likewise.
	* avr.md: Likewise.
	* mcore.c (try_constant_tricks, mcore_byte_offset,
	mcore_halfword_offset): Likewise.
	* sh.c (shl_sext_kind, gen_block_redirect, split_branches): Likewise.
	* v850.c (not_power_of_two_operand): Likewise.

From-SVN: r48073

3 files changed, 15 insertions, 15 deletions

diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
index 2a3ff91..8b7e1a1 100644
--- a/gcc/config/avr/avr.c
+++ b/gcc/config/avr/avr.c
@@ -1358,7 +1358,7 @@ avr_simplify_comparision_p (mode, operator, x)
 {
   unsigned int max = (mode == QImode ? 0xff :
                       mode == HImode ? 0xffff :
-                      mode == SImode ? 0xffffffffU : 0);
+                      mode == SImode ? 0xffffffff : 0);
   if (max && operator && GET_CODE (x) == CONST_INT)
     {
       if (unsigned_condition (operator) != operator)
@@ -4242,8 +4242,8 @@ adjust_insn_length (insn, len)
 	      if (GET_MODE (op[1]) == SImode)
 		len = (((mask & 0xff) != 0xff)
 		       + ((mask & 0xff00) != 0xff00)
-		       + ((mask & 0xff0000UL) != 0xff0000UL)
-		       + ((mask & 0xff000000UL) != 0xff000000UL));
+		       + ((mask & 0xff0000L) != 0xff0000L)
+		       + ((mask & 0xff000000L) != 0xff000000L));
 	      else if (GET_MODE (op[1]) == HImode)
 		len = (((mask & 0xff) != 0xff)
 		       + ((mask & 0xff00) != 0xff00));
@@ -4257,8 +4257,8 @@ adjust_insn_length (insn, len)
 	      if (GET_MODE (op[1]) == SImode)
 		len = (((mask & 0xff) != 0)
 		       + ((mask & 0xff00) != 0)
-		       + ((mask & 0xff0000UL) != 0)
-		       + ((mask & 0xff000000UL) != 0));
+		       + ((mask & 0xff0000L) != 0)
+		       + ((mask & 0xff000000L) != 0));
 	      else if (GET_MODE (op[1]) == HImode)
 		len = (((mask & 0xff) != 0)
 		       + ((mask & 0xff00) != 0));
@@ -5162,9 +5162,9 @@ mask_one_bit_p (mask)
   unsigned HOST_WIDE_INT n=mask;
   for (i = 0; i < 32; ++i)
     {
-      if (n & 0x80000000UL)
+      if (n & 0x80000000L)
 	{
-	  if (n & 0x7fffffffUL)
+	  if (n & 0x7fffffffL)
 	    return 0;
 	  else
 	    return 32-i;
@@ -5347,7 +5347,7 @@ output_reload_insisf (insn, operands, len)
 	*len = 4 + ((INTVAL (src) & 0xff) != 0)
 		+ ((INTVAL (src) & 0xff00) != 0)
 		+ ((INTVAL (src) & 0xff0000) != 0)
-		+ ((INTVAL (src) & 0xff000000U) != 0);
+		+ ((INTVAL (src) & 0xff000000) != 0);
       else
 	*len = 8;
 
@@ -5375,7 +5375,7 @@ output_reload_insisf (insn, operands, len)
       output_asm_insn (AS2 (ldi, %2, hlo8(%1)), operands);
       output_asm_insn (AS2 (mov, %C0, %2), operands);
     }
-  if (cnst && ((INTVAL (src) & 0xff000000U) == 0))
+  if (cnst && ((INTVAL (src) & 0xff000000) == 0))
     output_asm_insn (AS2 (mov, %D0, __zero_reg__), operands);
   else
     {
diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h
index 736f285..23810bf 100644
--- a/gcc/config/avr/avr.h
+++ b/gcc/config/avr/avr.h
@@ -613,8 +613,8 @@ enum reg_class {
   {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16),	\
      0x00000000},	/* LD_REGS, r16 - r31 */			\
   {0x0000ffff,0x00000000}, 	/* NO_LD_REGS  r0 - r15 */              \
-  {0xffffffffu,0x00000000},	/* GENERAL_REGS, r0 - r31 */		\
-  {0xffffffffu,0x00000003}	/* ALL_REGS */				\
+  {0xffffffff,0x00000000},	/* GENERAL_REGS, r0 - r31 */		\
+  {0xffffffff,0x00000003}	/* ALL_REGS */				\
 }
 /* An initializer containing the contents of the register classes, as
    integers which are bit masks.  The Nth integer specifies the
diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md
index a62f679..3c1432d 100644
--- a/gcc/config/avr/avr.md
+++ b/gcc/config/avr/avr.md
@@ -996,9 +996,9 @@
 	    output_asm_insn (AS2 (andi,%A0,lo8(%2)), operands);
 	  if ((mask & 0xff00) != 0xff00)
 	    output_asm_insn (AS2 (andi,%B0,hi8(%2)), operands);
-	  if ((mask & 0xff0000UL) != 0xff0000UL)
+	  if ((mask & 0xff0000L) != 0xff0000L)
 	    output_asm_insn (AS2 (andi,%C0,hlo8(%2)), operands);
-	  if ((mask & 0xff000000UL) != 0xff000000UL)
+	  if ((mask & 0xff000000L) != 0xff000000L)
 	    output_asm_insn (AS2 (andi,%D0,hhi8(%2)), operands);
 	  return \"\";
         }
@@ -1080,9 +1080,9 @@
 	  output_asm_insn (AS2 (ori,%A0,lo8(%2)), operands);
 	if (mask & 0xff00)
 	  output_asm_insn (AS2 (ori,%B0,hi8(%2)), operands);
-	if (mask & 0xff0000UL)
+	if (mask & 0xff0000L)
 	  output_asm_insn (AS2 (ori,%C0,hlo8(%2)), operands);
-	if (mask & 0xff000000UL)
+	if (mask & 0xff000000L)
 	  output_asm_insn (AS2 (ori,%D0,hhi8(%2)), operands);
 	return \"\";
       }