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| author | Joey Ye <joey.ye@arm.com> | 2012-04-13 08:05:39 +0000 |
|---|---|---|
| committer | Joey Ye <jye2@gcc.gnu.org> | 2012-04-13 08:05:39 +0000 |
| commit | 572a49c87c812ea9c43b0fd4e4049f9978f3476c (patch) | |
| tree | cd0a59eef33c4b56fe8636a20ee892d2bcdf304b /gcc/config/arm/arm.md | |
| parent | 50f751248974d136717c7d1d7aa0a05087b0b094 (diff) | |
| download | gcc-572a49c87c812ea9c43b0fd4e4049f9978f3476c.zip gcc-572a49c87c812ea9c43b0fd4e4049f9978f3476c.tar.gz gcc-572a49c87c812ea9c43b0fd4e4049f9978f3476c.tar.bz2 | |
constraints.md (Pe): New constraint.
2012-04-13 Joey Ye <joey.ye@arm.com>
* config/arm/constraints.md (Pe): New constraint.
* config/arm/arm.md: New split for imm 256-510.
testsuite:
* gcc.target/arm/thumb1-imm.c: New testcase.
From-SVN: r186406
Diffstat (limited to 'gcc/config/arm/arm.md')
| -rw-r--r-- | gcc/config/arm/arm.md | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 3cdc1535..79eff0e 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -5652,6 +5652,21 @@ }" ) +;; For thumb1 split imm move [256-510] into mov [1-255] and add #255 +(define_split + [(set (match_operand:SI 0 "register_operand" "") + (match_operand:SI 1 "const_int_operand" ""))] + "TARGET_THUMB1 && satisfies_constraint_Pe (operands[1])" + [(set (match_dup 2) (match_dup 1)) + (set (match_dup 0) (plus:SI (match_dup 2) (match_dup 3)))] + " + { + operands[1] = GEN_INT (INTVAL (operands[1]) - 255); + operands[2] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0]; + operands[3] = GEN_INT (255); + }" +) + ;; When generating pic, we need to load the symbol offset into a register. ;; So that the optimizer does not confuse this with a normal symbol load ;; we use an unspec. The offset will be loaded from a constant pool entry, |