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authorH.J. Lu <hongjiu.lu@intel.com>2010-09-14 17:02:10 +0000
committerH.J. Lu <hjl@gcc.gnu.org>2010-09-14 10:02:10 -0700
commit26983c22532f0119ef77c5ad53e622a38a8de81f (patch)
tree234df070889197d6478e55b7ed00545077288920 /gcc/config/arm/arm.c
parentb93cf3427d41c321829356996b89836ad0dbe58b (diff)
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Turn UNITS_PER_SIMD_WORD into a target hook.
2010-09-14 H.J. Lu <hongjiu.lu@intel.com> * defaults.h (UNITS_PER_SIMD_WORD): Removed. * config/arm/arm.h (UNITS_PER_SIMD_WORD): Likewise. * config/i386/i386.h (UNITS_PER_SIMD_WORD): Likewise. * config/mips/mips.h (UNITS_PER_SIMD_WORD): Likewise. * config/rs6000/rs6000.h (UNITS_PER_SIMD_WORD): Likewise. * config/sparc/sparc.h (UNITS_PER_SIMD_WORD): Likewise. * target.def: Add units_per_simd_word to vectorize. * targhooks.c (default_units_per_simd_word): New. * targhooks.h (default_units_per_simd_word): Likewise. * config/arm/arm.c (arm_units_per_simd_word): Likewise. (TARGET_VECTORIZE_UNITS_PER_SIMD_WORD): Likewise. * config/mips/mips.c (mips_units_per_simd_word): Likewise. (TARGET_VECTORIZE_UNITS_PER_SIMD_WORD): Likewise. * config/rs6000/rs6000.c (rs6000_units_per_simd_word): Likewise. (TARGET_VECTORIZE_UNITS_PER_SIMD_WORD): Likewise. * config/sparc/sparc.c (sparc_units_per_simd_word): Likewise. (TARGET_VECTORIZE_UNITS_PER_SIMD_WORD): Likewise. * tree-vect-loop.c: Replace UNITS_PER_SIMD_WORD with TARGET_VECTORIZE_UNITS_PER_SIMD_WORD in comments. * tree-vect-stmts.c (get_vectype_for_scalar_type): Replace UNITS_PER_SIMD_WORD with targetm.vectorize.units_per_simd_word. * system.h (UNITS_PER_SIMD_WORD): Poisoned. * config/i386/i386-protos.h (ix86_units_per_simd_word): Removed. * config/i386/i386.c (ix86_units_per_simd_word): Make it static. (TARGET_VECTORIZE_UNITS_PER_SIMD_WORD): New. * doc/tm.texi.in: Remove UNITS_PER_SIMD_WORD. Add TARGET_VECTORIZE_UNITS_PER_SIMD_WORD. * doc/tm.texi: Regenerated. From-SVN: r164285
Diffstat (limited to 'gcc/config/arm/arm.c')
-rw-r--r--gcc/config/arm/arm.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 1d547b0..6f260ec 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -236,6 +236,7 @@ static rtx arm_trampoline_adjust_address (rtx);
static rtx arm_pic_static_addr (rtx orig, rtx reg);
static bool cortex_a9_sched_adjust_cost (rtx, rtx, rtx, int *);
static bool xscale_sched_adjust_cost (rtx, rtx, rtx, int *);
+static unsigned int arm_units_per_simd_word (enum machine_mode);
/* Table of machine attributes. */
@@ -363,6 +364,8 @@ static const struct attribute_spec arm_attribute_table[] =
#define TARGET_SHIFT_TRUNCATION_MASK arm_shift_truncation_mask
#undef TARGET_VECTOR_MODE_SUPPORTED_P
#define TARGET_VECTOR_MODE_SUPPORTED_P arm_vector_mode_supported_p
+#undef TARGET_VECTORIZE_UNITS_PER_SIMD_WORD
+#define TARGET_VECTORIZE_UNITS_PER_SIMD_WORD arm_units_per_simd_word
#undef TARGET_MACHINE_DEPENDENT_REORG
#define TARGET_MACHINE_DEPENDENT_REORG arm_reorg
@@ -21869,6 +21872,17 @@ arm_vector_mode_supported_p (enum machine_mode mode)
return false;
}
+/* Use the option -mvectorize-with-neon-quad to override the use of doubleword
+ registers when autovectorizing for Neon, at least until multiple vector
+ widths are supported properly by the middle-end. */
+
+static unsigned int
+arm_units_per_simd_word (enum machine_mode mode ATTRIBUTE_UNUSED)
+{
+ return (TARGET_NEON
+ ? (TARGET_NEON_VECTORIZE_QUAD ? 16 : 8) : UNITS_PER_WORD);
+}
+
/* Implements target hook small_register_classes_for_mode_p. */
bool
arm_small_register_classes_for_mode_p (enum machine_mode mode ATTRIBUTE_UNUSED)