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| author | Uros Bizjak <ubizjak@gmail.com> | 2009-09-30 09:13:20 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2009-09-30 09:13:20 +0200 |
| commit | 08a4a761ebe388e1b231eabd6f8e7e155d10b222 (patch) | |
| tree | 9e128ec574bf2a222c259d1a12f00d3d15ba25a0 /gcc/config/alpha/alpha.md | |
| parent | c03c52480a18bf0d6060d99e597bc284fd576a31 (diff) | |
| download | gcc-08a4a761ebe388e1b231eabd6f8e7e155d10b222.zip gcc-08a4a761ebe388e1b231eabd6f8e7e155d10b222.tar.gz gcc-08a4a761ebe388e1b231eabd6f8e7e155d10b222.tar.bz2 | |
re PR target/22093 (Unaligned access to HI values causes unrecognizable insn error)
PR target/22093
* config/alpha/alpha.md (unaligned_storehi_be): Force operand
of plus RTX into register.
testsuite/ChangeLog:
PR target/22093
* gcc.target/alpha/pr22093.c: New test.
From-SVN: r152322
Diffstat (limited to 'gcc/config/alpha/alpha.md')
| -rw-r--r-- | gcc/config/alpha/alpha.md | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 2773008..2327879 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -5861,7 +5861,7 @@ (mem:DI (and:DI (match_operand:DI 0 "address_operand" "") (const_int -8)))) (set (match_operand:DI 2 "register_operand" "") - (plus:DI (match_dup 0) (const_int 1))) + (plus:DI (match_dup 5) (const_int 1))) (set (match_dup 3) (and:DI (not:DI (ashift:DI (const_int 65535) @@ -5876,7 +5876,7 @@ (set (mem:DI (and:DI (match_dup 0) (const_int -8))) (match_dup 4))] "WORDS_BIG_ENDIAN" - "") + "operands[5] = force_reg (DImode, operands[0]);") ;; Here are the define_expand's for QI and HI moves that use the above ;; patterns. We have the normal sets, plus the ones that need scratch |