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| author | Andrew Carlotti <andrew.carlotti@arm.com> | 2024-08-01 11:54:20 +0100 |
|---|---|---|
| committer | Andrew Carlotti <andrew.carlotti@arm.com> | 2025-01-10 14:12:07 +0000 |
| commit | 9bbb91e8e0a3a26fe2ff651a89011ca5a0b4794d (patch) | |
| tree | 6091c4c7b9a5e7cd507a24e897f747da8b29b40b /gcc/config/aarch64 | |
| parent | 20385cb92cbd4a1934661ab97a162c1e25935836 (diff) | |
| download | gcc-9bbb91e8e0a3a26fe2ff651a89011ca5a0b4794d.zip gcc-9bbb91e8e0a3a26fe2ff651a89011ca5a0b4794d.tar.gz gcc-9bbb91e8e0a3a26fe2ff651a89011ca5a0b4794d.tar.bz2 | |
aarch64: Add new +fcma flag
This includes +fcma as a dependency of +sve, and means that we can
finally support fcma intrinsics on a64fx.
Also add fcma to the Features list in several cpunative testcases that
incorrectly included sve without fcma.
gcc/ChangeLog:
* config/aarch64/aarch64-arches.def (V8_3A): Add FCMA.
* config/aarch64/aarch64-option-extensions.def (FCMA): New flag.
(SVE): Add FCMA dependency.
* config/aarch64/aarch64.h (TARGET_COMPLEX): Use new flag.
* config/aarch64/arm_neon.h: Use new flag for fcma intrinsics.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/cpunative/info_15: Add fcma to Features.
* gcc.target/aarch64/cpunative/info_16: Ditto.
* gcc.target/aarch64/cpunative/info_17: Ditto.
* gcc.target/aarch64/cpunative/info_8: Ditto.
* gcc.target/aarch64/cpunative/info_9: Ditto.
Diffstat (limited to 'gcc/config/aarch64')
| -rw-r--r-- | gcc/config/aarch64/aarch64-arches.def | 2 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-option-extensions.def | 4 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.h | 2 | ||||
| -rw-r--r-- | gcc/config/aarch64/arm_neon.h | 2 |
4 files changed, 6 insertions, 4 deletions
diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def index 62a7d9f..d85b14b 100644 --- a/gcc/config/aarch64/aarch64-arches.def +++ b/gcc/config/aarch64/aarch64-arches.def @@ -33,7 +33,7 @@ AARCH64_ARCH("armv8-a", generic_armv8_a, V8A, 8, (SIMD)) AARCH64_ARCH("armv8.1-a", generic_armv8_a, V8_1A, 8, (V8A, LSE, CRC, RDMA)) AARCH64_ARCH("armv8.2-a", generic_armv8_a, V8_2A, 8, (V8_1A)) -AARCH64_ARCH("armv8.3-a", generic_armv8_a, V8_3A, 8, (V8_2A, PAUTH, RCPC)) +AARCH64_ARCH("armv8.3-a", generic_armv8_a, V8_3A, 8, (V8_2A, PAUTH, RCPC, FCMA)) AARCH64_ARCH("armv8.4-a", generic_armv8_a, V8_4A, 8, (V8_3A, F16FML, DOTPROD, FLAGM)) AARCH64_ARCH("armv8.5-a", generic_armv8_a, V8_5A, 8, (V8_4A, SB, SSBS, PREDRES)) AARCH64_ARCH("armv8.6-a", generic_armv8_a, V8_6A, 8, (V8_5A, I8MM, BF16)) diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def index 6a70a63..c41c4998c 100644 --- a/gcc/config/aarch64/aarch64-option-extensions.def +++ b/gcc/config/aarch64/aarch64-option-extensions.def @@ -151,6 +151,8 @@ AARCH64_OPT_EXTENSION("fp16fml", F16FML, (), (F16), (), "asimdfhm") AARCH64_FMV_FEATURE("fp16fml", FP16FML, (F16FML)) +AARCH64_OPT_FMV_EXTENSION("fcma", FCMA, (SIMD), (), (), "fcma") + AARCH64_OPT_FMV_EXTENSION("rcpc", RCPC, (), (), (), "lrcpc") AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (RCPC), (), (), "lrcpc3") @@ -163,7 +165,7 @@ AARCH64_OPT_FMV_EXTENSION("bf16", BF16, (FP), (SIMD), (), "bf16") AARCH64_FMV_FEATURE("rpres", RPRES, ()) -AARCH64_OPT_FMV_EXTENSION("sve", SVE, (SIMD, F16), (), (), "sve") +AARCH64_OPT_FMV_EXTENSION("sve", SVE, (SIMD, F16, FCMA), (), (), "sve") /* This specifically does not imply +sve. */ AARCH64_OPT_EXTENSION("sve-b16b16", SVE_B16B16, (), (), (), "sveb16b16") diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 75ea2a6..250edb7 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -364,7 +364,7 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE ATTRIBUTE_UNUSED #define TARGET_JSCVT (TARGET_FLOAT && TARGET_ARMV8_3) /* Armv8.3-a Complex number extension to AdvSIMD extensions. */ -#define TARGET_COMPLEX (TARGET_SIMD && TARGET_ARMV8_3) +#define TARGET_COMPLEX AARCH64_HAVE_ISA (FCMA) /* Floating-point rounding instructions from Armv8.5-a. */ #define TARGET_FRINT (AARCH64_HAVE_ISA (V8_5A) && TARGET_FLOAT) diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 20849b0..da145ad 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -26975,7 +26975,7 @@ vbcaxq_s64 (int64x2_t __a, int64x2_t __b, int64x2_t __c) /* AdvSIMD Complex numbers intrinsics. */ #pragma GCC push_options -#pragma GCC target ("arch=armv8.3-a") +#pragma GCC target ("+nothing+fcma") #pragma GCC push_options #pragma GCC target ("+fp16") |