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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2018-07-19 13:59:17 +0000 |
|---|---|---|
| committer | Andre Vieira <avieira@gcc.gnu.org> | 2018-07-19 13:59:17 +0000 |
| commit | a25831acf41c58705f250b529684a5c2deaa63d6 (patch) | |
| tree | f9928aff384a9abaa0c1b435535e604036b392d5 /gcc/config/aarch64/constraints.md | |
| parent | 851fd3661346f314bf33d846bb9b88194523857e (diff) | |
| download | gcc-a25831acf41c58705f250b529684a5c2deaa63d6.zip gcc-a25831acf41c58705f250b529684a5c2deaa63d6.tar.gz gcc-a25831acf41c58705f250b529684a5c2deaa63d6.tar.bz2 | |
[AArch64][PATCH 1/2] Fix addressing printing of LDP/STP
gcc/ChangeLog
2018-07-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/aarch64/aarch64-simd.md (aarch64_simd_mov<VQ:mode>): Replace
Umq with Umn.
(store_pair_lanes<mode>): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_addr_query_type): Add new
enum value 'ADDR_QUERY_LDP_STP_N'.
* config/aarch64/aarch64.c (aarch64_addr_query_type): Likewise.
(aarch64_print_address_internal): Add declaration.
(aarch64_print_ldpstp_address): Remove.
(aarch64_classify_address): Adapt mode for 'ADDR_QUERY_LDP_STP_N'.
(aarch64_print_operand): Change printing of 'y'.
* config/aarch64/predicates.md (aarch64_mem_pair_lanes_operand): Use
new enum value 'ADDR_QUERY_LDP_STP_N', don't hardcode mode and use
'true' rather than '1'.
* gcc/config/aarch64/constraints.md (Uml): Likewise.
(Uml): Rename to Umn.
(Umq): Remove.
From-SVN: r262880
Diffstat (limited to 'gcc/config/aarch64/constraints.md')
| -rw-r--r-- | gcc/config/aarch64/constraints.md | 20 |
1 files changed, 7 insertions, 13 deletions
diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constraints.md index 32a0fa6..72cacda 100644 --- a/gcc/config/aarch64/constraints.md +++ b/gcc/config/aarch64/constraints.md @@ -218,14 +218,6 @@ (and (match_code "mem") (match_test "REG_P (XEXP (op, 0))"))) -(define_memory_constraint "Umq" - "@internal - A memory address which uses a base register with an offset small enough for - a load/store pair operation in DI mode." - (and (match_code "mem") - (match_test "aarch64_legitimate_address_p (DImode, XEXP (op, 0), false, - ADDR_QUERY_LDP_STP)"))) - (define_memory_constraint "Ump" "@internal A memory address suitable for a load/store pair operation." @@ -233,14 +225,16 @@ (match_test "aarch64_legitimate_address_p (GET_MODE (op), XEXP (op, 0), true, ADDR_QUERY_LDP_STP)"))) -;; Used for storing two 64-bit values in an AdvSIMD register using an STP -;; as a 128-bit vec_concat. -(define_memory_constraint "Uml" +;; Used for storing or loading pairs in an AdvSIMD register using an STP/LDP +;; as a vector-concat. The address mode uses the same constraints as if it +;; were for a single value. +(define_memory_constraint "Umn" "@internal A memory address suitable for a load/store pair operation." (and (match_code "mem") - (match_test "aarch64_legitimate_address_p (DFmode, XEXP (op, 0), 1, - ADDR_QUERY_LDP_STP)"))) + (match_test "aarch64_legitimate_address_p (GET_MODE (op), XEXP (op, 0), + true, + ADDR_QUERY_LDP_STP_N)"))) (define_memory_constraint "Utr" "@internal |