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| author | Jakub Jelinek <jakub@redhat.com> | 2023-11-27 09:22:20 +0100 |
|---|---|---|
| committer | Jakub Jelinek <jakub@redhat.com> | 2023-11-27 09:22:20 +0100 |
| commit | 221166ad15eb37b047c77118f2eb1c8442eaa27b (patch) | |
| tree | 2a5a9c131528754d6299768228190047ea6261a2 /gcc/config.gcc | |
| parent | e02772344815e505c8c146ce48b1427dc9e9d190 (diff) | |
| download | gcc-221166ad15eb37b047c77118f2eb1c8442eaa27b.zip gcc-221166ad15eb37b047c77118f2eb1c8442eaa27b.tar.gz gcc-221166ad15eb37b047c77118f2eb1c8442eaa27b.tar.bz2 | |
mips: Fix up mips*-sde-elf* build [PR112300]
As reported in the PR, mipsisa64r2-sde-elf doesn't build because HEAP_TRAMPOLINES_INIT
macro isn't defined anywhere.
It is normally defined by
# Figure out if we need to enable heap trampolines by default
case ${target} in
*-*-darwin2*)
# Currently, we do this for macOS 11 and above.
tm_defines="$tm_defines HEAP_TRAMPOLINES_INIT=1"
;;
*)
tm_defines="$tm_defines HEAP_TRAMPOLINES_INIT=0"
;;
esac
in config.gcc, but mips*-sde-elf* is the only target which overwrites
tm_defines shell variable rather than just appending to it (or in one case
prepending), all other targets append something to it, including other
mips* triplets.
I believe (just from looking at config.gcc) that the difference is that
LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3 LIBC_MUSL=4 HEAP_TRAMPOLINES_INIT=0
isn't defined without the patch and is with the patch.
I think defining those first 4 shouldn't cause any harm and defining the
last one is required for it to actually build at all.
2023-11-27 Jakub Jelinek <jakub@redhat.com>
PR target/112300
* config.gcc (mips*-sde-elf*): Append to tm_defines rather than
overwriting them.
Diffstat (limited to 'gcc/config.gcc')
| -rw-r--r-- | gcc/config.gcc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config.gcc b/gcc/config.gcc index 0791f19..3000379 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -2681,22 +2681,22 @@ mips*-sde-elf*) esac case ${target} in mipsisa32r6*) - tm_defines="MIPS_ISA_DEFAULT=MIPS_ISA_MIPS32R6 MIPS_ABI_DEFAULT=ABI_32" + tm_defines="${tm_defines} MIPS_ISA_DEFAULT=MIPS_ISA_MIPS32R6 MIPS_ABI_DEFAULT=ABI_32" ;; mipsisa32r2*) - tm_defines="MIPS_ISA_DEFAULT=MIPS_ISA_MIPS32R2 MIPS_ABI_DEFAULT=ABI_32" + tm_defines="${tm_defines} MIPS_ISA_DEFAULT=MIPS_ISA_MIPS32R2 MIPS_ABI_DEFAULT=ABI_32" ;; mipsisa32*) - tm_defines="MIPS_ISA_DEFAULT=MIPS_ISA_MIPS32 MIPS_ABI_DEFAULT=ABI_32" + tm_defines="${tm_defines} MIPS_ISA_DEFAULT=MIPS_ISA_MIPS32 MIPS_ABI_DEFAULT=ABI_32" ;; mipsisa64r6*) - tm_defines="MIPS_ISA_DEFAULT=MIPS_ISA_MIPS64R6 MIPS_ABI_DEFAULT=ABI_N32" + tm_defines="${tm_defines} MIPS_ISA_DEFAULT=MIPS_ISA_MIPS64R6 MIPS_ABI_DEFAULT=ABI_N32" ;; mipsisa64r2*) - tm_defines="MIPS_ISA_DEFAULT=MIPS_ISA_MIPS64R2 MIPS_ABI_DEFAULT=ABI_N32" + tm_defines="${tm_defines} MIPS_ISA_DEFAULT=MIPS_ISA_MIPS64R2 MIPS_ABI_DEFAULT=ABI_N32" ;; mipsisa64*) - tm_defines="MIPS_ISA_DEFAULT=MIPS_ISA_MIPS64 MIPS_ABI_DEFAULT=ABI_N32" + tm_defines="${tm_defines} MIPS_ISA_DEFAULT=MIPS_ISA_MIPS64 MIPS_ABI_DEFAULT=ABI_N32" ;; esac ;; |