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| author | Richard Sandiford <richard.sandiford@arm.com> | 2020-01-10 18:44:39 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2020-01-10 18:44:39 +0000 |
| commit | 9b0700571fe390afcca32dcb3b2122640e628c95 (patch) | |
| tree | 7e16f8d2025ae0a29fc52c392753091187110b59 /gcc/config.gcc | |
| parent | f25e33fa1b62a6f6c8dddf8e6a7961fae6847a0e (diff) | |
| download | gcc-9b0700571fe390afcca32dcb3b2122640e628c95.zip gcc-9b0700571fe390afcca32dcb3b2122640e628c95.tar.gz gcc-9b0700571fe390afcca32dcb3b2122640e628c95.tar.bz2 | |
[AArch64] Make -msve-vector-bits=128 generate VL-specific code
related_vector_mode and compatible_vector_types_p make it possible
to generate 128-bit SVE code while still maintaining the distinction
between SVE vectors and Advanced SIMD vectors. We can therefore generate
VL-specific code for -msve-vector-bits=128 on little-endian targets.
In theory we could do the same for big-endian targets, but it could
have quite a high overhead; see the comment in the patch for details.
2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* doc/invoke.texi (-msve-vector-bits=): Document that
-msve-vector-bits=128 now generates VL-specific code for
little-endian targets.
* config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
build_vector_type_for_mode to construct the data vector types.
* config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
VL-specific code for -msve-vector-bits=128 on little-endian targets.
(aarch64_simd_container_mode): Always prefer Advanced SIMD modes
for 128-bit vectors.
gcc/testsuite/
* gcc.target/aarch64/sve/struct_vect_1.c (N): Protect with #ifndef.
* gcc.target/aarch64/sve/pcs/return_1_128.c: New test.
* gcc.target/aarch64/sve/pcs/return_4_128.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5_128.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6_128.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_1_128.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_2_128.c: Likewise.
* gcc.target/aarch64/sve/single_5.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_25.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_26.c: Likewise.
From-SVN: r280125
Diffstat (limited to 'gcc/config.gcc')
0 files changed, 0 insertions, 0 deletions