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| author | Paul A. Clarke <pc@us.ibm.com> | 2018-10-26 18:38:25 +0000 |
|---|---|---|
| committer | Paul Clarke <pc@gcc.gnu.org> | 2018-10-26 18:38:25 +0000 |
| commit | b1ddadacb897251343102842dbb9ce97d0bae73c (patch) | |
| tree | 70c7c92e47d59b9c49b521d5face6a7e65574958 /gcc/config.gcc | |
| parent | 827651b0740936feea4f31d718a2175be128cc42 (diff) | |
| download | gcc-b1ddadacb897251343102842dbb9ce97d0bae73c.zip gcc-b1ddadacb897251343102842dbb9ce97d0bae73c.tar.gz gcc-b1ddadacb897251343102842dbb9ce97d0bae73c.tar.bz2 | |
[rs6000] Add compatible implementations of x86 SSSE3 intrinsics
This is a follow-on to earlier commits for adding compatibility
implementations of x86 intrinsics for PPC64LE. This is the first of
two patches. This patch adds the 32 x86 intrinsics from
<tmmintrin.h> ("SSSE3"). (Patch 2/2 adds tests for these intrinsics,
and briefly describes the tests performed.)
gcc/ChangeLog:
2018-10-26 Paul A. Clarke <pc@us.ibm.com>
* config/rs6000/tmmintrin.h: New file.
* config.gcc (powerpc*-*-*): Add tmmintrin.h to extra_headers.
From-SVN: r265542
Diffstat (limited to 'gcc/config.gcc')
| -rw-r--r-- | gcc/config.gcc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config.gcc b/gcc/config.gcc index a2e89e2..71f62a2 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -485,7 +485,7 @@ powerpc*-*-*) extra_headers="${extra_headers} bmi2intrin.h bmiintrin.h" extra_headers="${extra_headers} xmmintrin.h mm_malloc.h emmintrin.h" extra_headers="${extra_headers} mmintrin.h x86intrin.h" - extra_headers="${extra_headers} pmmintrin.h" + extra_headers="${extra_headers} pmmintrin.h tmmintrin.h" extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h" extra_headers="${extra_headers} amo.h" case x$with_cpu in |