aboutsummaryrefslogtreecommitdiff
path: root/gcc/config.gcc
diff options
context:
space:
mode:
authorTamar Christina <tamar.christina@arm.com>2020-12-16 20:43:47 +0000
committerTamar Christina <tamar.christina@arm.com>2020-12-16 20:43:54 +0000
commit84747acf8da36425f7e36cf99b251ee047b2e3a5 (patch)
tree9df7e178db23e4f9015bca549c456747f7e13563 /gcc/config.gcc
parentcdb1c276560b26a9c3bc837340669962ef1b430a (diff)
downloadgcc-84747acf8da36425f7e36cf99b251ee047b2e3a5.zip
gcc-84747acf8da36425f7e36cf99b251ee047b2e3a5.tar.gz
gcc-84747acf8da36425f7e36cf99b251ee047b2e3a5.tar.bz2
AArch64: Add NEON, SVE and SVE2 RTL patterns for Complex Addition.
This adds implementation for the optabs for add complex operations. With this the following C code: void f90 (float complex a[restrict N], float complex b[restrict N], float complex c[restrict N]) { for (int i=0; i < N; i++) c[i] = a[i] + (b[i] * I); } generates f90: mov x3, 0 .p2align 3,,7 .L2: ldr q0, [x0, x3] ldr q1, [x1, x3] fcadd v0.4s, v0.4s, v1.4s, #90 str q0, [x2, x3] add x3, x3, 16 cmp x3, 1600 bne .L2 ret instead of f90: add x3, x1, 1600 .p2align 3,,7 .L2: ld2 {v4.4s - v5.4s}, [x0], 32 ld2 {v2.4s - v3.4s}, [x1], 32 fsub v0.4s, v4.4s, v3.4s fadd v1.4s, v5.4s, v2.4s st2 {v0.4s - v1.4s}, [x2], 32 cmp x3, x1 bne .L2 ret gcc/ChangeLog: * config/aarch64/aarch64-simd.md (cadd<rot><mode>3): New. * config/aarch64/iterators.md (SVE2_INT_CADD_OP): New. * config/aarch64/aarch64-sve.md (cadd<rot><mode>3): New. * config/aarch64/aarch64-sve2.md (cadd<rot><mode>3): New.
Diffstat (limited to 'gcc/config.gcc')
0 files changed, 0 insertions, 0 deletions