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| author | Paul A. Clarke <pc@us.ibm.com> | 2018-10-09 20:25:57 +0000 |
|---|---|---|
| committer | Paul Clarke <pc@gcc.gnu.org> | 2018-10-09 20:25:57 +0000 |
| commit | 1fb0f8924f59decc2198de591d7fe80319419814 (patch) | |
| tree | 3ef4fa645f24904018b8391b0d3a466c7c0f9dc5 /gcc/config.gcc | |
| parent | af2d2d135a3374fb8cbd04f027683b0cbb868d88 (diff) | |
| download | gcc-1fb0f8924f59decc2198de591d7fe80319419814.zip gcc-1fb0f8924f59decc2198de591d7fe80319419814.tar.gz gcc-1fb0f8924f59decc2198de591d7fe80319419814.tar.bz2 | |
This is a follow-on to earlier commits for adding compatibility implementations of x86 intrinsics for PPC64LE.
This is a follow-on to earlier commits for adding compatibility
implementations of x86 intrinsics for PPC64LE. This is the first of
two patches. This patch adds 11 of the 13 x86 intrinsics from
<pmmintrin.h> ("SSE3"). (Patch 2/2 adds tests for these intrinsics,
and briefly describes the tests performed.)
Implementations are relatively straightforward, with occasional
extra effort for vector element ordering.
Not implemented are _mm_wait and _mm_monitor, as there are no
direct or trivial analogs in the POWER ISA.
./gcc/ChangeLog:
2018-10-05 Paul A. Clarke <pc@us.ibm.com>
* config.gcc (powerpc*-*-*): Add pmmintrin.h to extra_headers.
* config/rs6000/pmmintrin.h: New file.
From-SVN: r264991
Diffstat (limited to 'gcc/config.gcc')
| -rw-r--r-- | gcc/config.gcc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/gcc/config.gcc b/gcc/config.gcc index 0c579d1..8521f7d 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -484,6 +484,7 @@ powerpc*-*-*) extra_headers="${extra_headers} bmi2intrin.h bmiintrin.h" extra_headers="${extra_headers} xmmintrin.h mm_malloc.h emmintrin.h" extra_headers="${extra_headers} mmintrin.h x86intrin.h" + extra_headers="${extra_headers} pmmintrin.h" extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h" extra_headers="${extra_headers} amo.h" case x$with_cpu in |