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| author | Kito Cheng <kito.cheng@gmail.com> | 2018-05-18 22:53:55 +0000 |
|---|---|---|
| committer | Jim Wilson <wilson@gcc.gnu.org> | 2018-05-18 15:53:55 -0700 |
| commit | 09baee1ab152afb0466c00ce87f0d681f2a50e21 (patch) | |
| tree | 099bc749227aa5e740a633ed64614b065584c3a2 /gcc/config.gcc | |
| parent | dc2ebc998a679294a672ecb4f585d66c9f10f56e (diff) | |
| download | gcc-09baee1ab152afb0466c00ce87f0d681f2a50e21.zip gcc-09baee1ab152afb0466c00ce87f0d681f2a50e21.tar.gz gcc-09baee1ab152afb0466c00ce87f0d681f2a50e21.tar.bz2 | |
RISC-V: Add RV32E support.
Kito Cheng <kito.cheng@gmail.com>
Monk Chiang <sh.chiang04@gmail.com>
gcc/
* common/config/riscv/riscv-common.c (riscv_parse_arch_string):
Add support to parse rv32e*. Clear MASK_RVE for rv32i and rv64i.
* config.gcc (riscv*-*-*): Add support for rv32e* and ilp32e.
* config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define
__riscv_32e when TARGET_RVE. Handle ABI_ILP32E as soft-float ABI.
* config/riscv/riscv-opts.h (riscv_abi_type): Add ABI_ILP32E.
* config/riscv/riscv.c (riscv_compute_frame_info): When TARGET_RVE,
compute save_libcall_adjustment properly.
(riscv_option_override): Call error if TARGET_RVE and not ABI_ILP32E.
(riscv_conditional_register_usage): Handle TARGET_RVE and ABI_ILP32E.
* config/riscv/riscv.h (UNITS_PER_FP_ARG): Handle ABI_ILP32E.
(STACK_BOUNDARY, ABI_STACK_BOUNDARY): Handle TARGET_RVE.
(GP_REG_LAST, MAX_ARGS_IN_REGISTERS): Likewise.
(ABI_SPEC): Handle mabi=ilp32e.
* config/riscv/riscv.opt (abi_type): Add ABI_ILP32E.
(RVE): Add RVE mask.
* doc/invoke.texi (RISC-V options) <-mabi>: Add ilp32e info.
<-march>: Add rv32e as an example.
gcc/testsuite/
* gcc.dg/stack-usage-1.c: Add support for rv32e.
libgcc/
* config/riscv/save-restore.S: Add support for rv32e.
Co-Authored-By: Jim Wilson <jimw@sifive.com>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>
From-SVN: r260384
Diffstat (limited to 'gcc/config.gcc')
| -rw-r--r-- | gcc/config.gcc | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/gcc/config.gcc b/gcc/config.gcc index 8edd0cd..96ae6a8 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -4077,19 +4077,20 @@ case "${target}" in # Infer arch from --with-arch, --target, and --with-abi. case "${with_arch}" in - rv32i* | rv32g* | rv64i* | rv64g*) + rv32e* | rv32i* | rv32g* | rv64i* | rv64g*) # OK. ;; "") # Infer XLEN, but otherwise assume GC. case "${with_abi}" in + ilp32e) with_arch="rv32e" ;; ilp32 | ilp32f | ilp32d) with_arch="rv32gc" ;; lp64 | lp64f | lp64d) with_arch="rv64gc" ;; *) with_arch="rv${xlen}gc" ;; esac ;; *) - echo "--with-arch=${with_arch} is not supported. The argument must begin with rv32i, rv32g, rv64i, or rv64g." 1>&2 + echo "--with-arch=${with_arch} is not supported. The argument must begin with rv32e, rv32i, rv32g, rv64i, or rv64g." 1>&2 exit 1 ;; esac @@ -4098,11 +4099,12 @@ case "${target}" in # pick a default based on the ISA, preferring soft-float # unless the D extension is present. case "${with_abi}" in - ilp32 | ilp32f | ilp32d | lp64 | lp64f | lp64d) + ilp32 | ilp32e | ilp32f | ilp32d | lp64 | lp64f | lp64d) ;; "") case "${with_arch}" in rv32*d* | rv32g*) with_abi=ilp32d ;; + rv32e*) with_abi=ilp32e ;; rv32*) with_abi=ilp32 ;; rv64*d* | rv64g*) with_abi=lp64d ;; rv64*) with_abi=lp64 ;; @@ -4116,7 +4118,7 @@ case "${target}" in # Make sure ABI and ISA are compatible. case "${with_abi},${with_arch}" in - ilp32,rv32* \ + ilp32,rv32* | ilp32e,rv32e* \ | ilp32f,rv32*f* | ilp32f,rv32g* \ | ilp32d,rv32*d* | ilp32d,rv32g* \ | lp64,rv64* \ |