diff options
| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2017-06-23 18:25:10 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2017-06-23 18:25:10 +0000 |
| commit | 37416b699f362c378a0351c3b2b2e32754a1cc76 (patch) | |
| tree | b9083af0fb1d5b5136518063b3cb24bc25110a57 /gcc/config.gcc | |
| parent | 9761349c768b0ea3fc12d2b36bb04ceb2d3aff8b (diff) | |
| download | gcc-37416b699f362c378a0351c3b2b2e32754a1cc76.zip gcc-37416b699f362c378a0351c3b2b2e32754a1cc76.tar.gz gcc-37416b699f362c378a0351c3b2b2e32754a1cc76.tar.bz2 | |
re PR target/80510 (Optimize Power7/power8 Altivec load/stores)
[gcc]
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* config/rs6000/rs6000.md (ALTIVEC_DFORM): Do not allow DImode in
32-bit, since indexed is not valid for DImode.
(mov<mode>_hardfloat32): Reorder ISA 2.07 load/stores before ISA
3.0 d-form load/stores to be the same as mov<mode>_hardfloat64.
(define_peephole2 for Altivec d-form load): Add 32-bit support.
(define_peephole2 for Altivec d-form store): Likewise.
[gcc/testsuite]
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* gcc.target/powerpc/pr80510-1.c: Allow test to run on 32-bit.
* gcc.target/powerpc/pr80510-2.c: Likewise.
From-SVN: r249607
Diffstat (limited to 'gcc/config.gcc')
0 files changed, 0 insertions, 0 deletions