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| author | Jun Sha (Joshua) <cooper.joshua@linux.alibaba.com> | 2024-01-12 11:20:29 +0800 |
|---|---|---|
| committer | Christoph Müllner <christoph.muellner@vrull.eu> | 2024-01-18 15:32:49 +0100 |
| commit | d05b5265110709996fa19af1267c6669b7992879 (patch) | |
| tree | e0a6ccaed1e0bf44071359cdd6ec945802c963ca /gcc/common | |
| parent | 60f58d0630805e8dce79f5489658fd83e42fa8f1 (diff) | |
| download | gcc-d05b5265110709996fa19af1267c6669b7992879.zip gcc-d05b5265110709996fa19af1267c6669b7992879.tar.gz gcc-d05b5265110709996fa19af1267c6669b7992879.tar.bz2 | |
RISC-V: Introduce XTheadVector as a subset of V1.0.0
This patch is to introduce basic XTheadVector support
(march string parsing and a test for __riscv_xtheadvector)
according to https://github.com/T-head-Semi/thead-extension-spec/
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc
(riscv_subset_list::parse): Add new vendor extension.
* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
Add test marco.
* config/riscv/riscv.opt: Add new mask.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/predef-__riscv_th_v_intrinsic.c: New test.
* gcc.target/riscv/rvv/xtheadvector.c: New test.
Co-authored-by: Jin Ma <jinma@linux.alibaba.com>
Co-authored-by: Xianmiao Qu <cooper.qu@linux.alibaba.com>
Co-authored-by: Christoph Müllner <christoph.muellner@vrull.eu>
Diffstat (limited to 'gcc/common')
| -rw-r--r-- | gcc/common/config/riscv/riscv-common.cc | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc index 0301d17..4497220 100644 --- a/gcc/common/config/riscv/riscv-common.cc +++ b/gcc/common/config/riscv/riscv-common.cc @@ -368,6 +368,7 @@ static const struct riscv_ext_version riscv_ext_version_table[] = {"xtheadmemidx", ISA_SPEC_CLASS_NONE, 1, 0}, {"xtheadmempair", ISA_SPEC_CLASS_NONE, 1, 0}, {"xtheadsync", ISA_SPEC_CLASS_NONE, 1, 0}, + {"xtheadvector", ISA_SPEC_CLASS_NONE, 1, 0}, {"xventanacondops", ISA_SPEC_CLASS_NONE, 1, 0}, @@ -1251,6 +1252,15 @@ riscv_subset_list::check_conflict_ext () if (lookup ("zcmp")) error_at (m_loc, "%<-march=%s%>: zcd conflicts with zcmp", m_arch); } + + if ((lookup ("v") || lookup ("zve32x") + || lookup ("zve64x") || lookup ("zve32f") + || lookup ("zve64f") || lookup ("zve64d") + || lookup ("zvl32b") || lookup ("zvl64b") + || lookup ("zvl128b") || lookup ("zvfh")) + && lookup ("xtheadvector")) + error_at (m_loc, "%<-march=%s%>: xtheadvector conflicts with vector " + "extension or its sub-extensions", m_arch); } /* Parsing function for multi-letter extensions. @@ -1743,6 +1753,19 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] = {"xtheadmemidx", &gcc_options::x_riscv_xthead_subext, MASK_XTHEADMEMIDX}, {"xtheadmempair", &gcc_options::x_riscv_xthead_subext, MASK_XTHEADMEMPAIR}, {"xtheadsync", &gcc_options::x_riscv_xthead_subext, MASK_XTHEADSYNC}, + {"xtheadvector", &gcc_options::x_riscv_xthead_subext, MASK_XTHEADVECTOR}, + {"xtheadvector", &gcc_options::x_riscv_vector_elen_flags, MASK_VECTOR_ELEN_32}, + {"xtheadvector", &gcc_options::x_riscv_vector_elen_flags, MASK_VECTOR_ELEN_64}, + {"xtheadvector", &gcc_options::x_riscv_vector_elen_flags, MASK_VECTOR_ELEN_FP_32}, + {"xtheadvector", &gcc_options::x_riscv_vector_elen_flags, MASK_VECTOR_ELEN_FP_64}, + {"xtheadvector", &gcc_options::x_riscv_vector_elen_flags, MASK_VECTOR_ELEN_FP_16}, + {"xtheadvector", &gcc_options::x_riscv_zvl_flags, MASK_ZVL32B}, + {"xtheadvector", &gcc_options::x_riscv_zvl_flags, MASK_ZVL64B}, + {"xtheadvector", &gcc_options::x_riscv_zvl_flags, MASK_ZVL128B}, + {"xtheadvector", &gcc_options::x_riscv_zf_subext, MASK_ZVFHMIN}, + {"xtheadvector", &gcc_options::x_riscv_zf_subext, MASK_ZVFH}, + {"xtheadvector", &gcc_options::x_target_flags, MASK_FULL_V}, + {"xtheadvector", &gcc_options::x_target_flags, MASK_VECTOR}, {"xventanacondops", &gcc_options::x_riscv_xventana_subext, MASK_XVENTANACONDOPS}, |