diff options
author | Kito Cheng <kito.cheng@sifive.com> | 2020-11-11 14:04:34 +0800 |
---|---|---|
committer | Kito Cheng <kito.cheng@sifive.com> | 2020-11-18 15:02:22 +0800 |
commit | b03be74bad08c382da47e048007a78fa3fb4ef49 (patch) | |
tree | 80fe3a8af8a760238fb992f7859bbc643f428feb /gcc/common | |
parent | 6a5bb4705fb75fd3afdde938193c59938cc7bfde (diff) | |
download | gcc-b03be74bad08c382da47e048007a78fa3fb4ef49.zip gcc-b03be74bad08c382da47e048007a78fa3fb4ef49.tar.gz gcc-b03be74bad08c382da47e048007a78fa3fb4ef49.tar.bz2 |
RISC-V: Support zicsr and zifencei extension for -march.
- CSR related instructions and fence instructions has to be splitted from
baseline ISA, zicsr and zifencei are corresponding sub-extension.
gcc/ChangeLog:
* common/config/riscv/riscv-common.c (riscv_implied_info):
d and f implied zicsr.
(riscv_ext_flag_table): Handle zicsr and zifencei.
* config/riscv/riscv-opts.h (MASK_ZICSR): New.
(MASK_ZIFENCEI): Ditto.
(TARGET_ZICSR): Ditto.
(TARGET_ZIFENCEI): Ditto.
* config/riscv/riscv.md (clear_cache): Check TARGET_ZIFENCEI.
(fence_i): Ditto.
* config/riscv/riscv.opt (riscv_zi_subext): New.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-8.c: New.
* gcc.target/riscv/attribute-14.c: Ditto.
Diffstat (limited to 'gcc/common')
-rw-r--r-- | gcc/common/config/riscv/riscv-common.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/gcc/common/config/riscv/riscv-common.c b/gcc/common/config/riscv/riscv-common.c index f5f7be3..ca88ca1 100644 --- a/gcc/common/config/riscv/riscv-common.c +++ b/gcc/common/config/riscv/riscv-common.c @@ -57,6 +57,8 @@ struct riscv_implied_info_t static const riscv_implied_info_t riscv_implied_info[] = { {"d", "f"}, + {"f", "zicsr"}, + {"d", "zicsr"}, {NULL, NULL} }; @@ -812,6 +814,10 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] = {"f", &gcc_options::x_target_flags, MASK_HARD_FLOAT}, {"d", &gcc_options::x_target_flags, MASK_DOUBLE_FLOAT}, {"c", &gcc_options::x_target_flags, MASK_RVC}, + + {"zicsr", &gcc_options::x_riscv_zi_subext, MASK_ZICSR}, + {"zifencei", &gcc_options::x_riscv_zi_subext, MASK_ZIFENCEI}, + {NULL, NULL, 0} }; |