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authorIan Lance Taylor <iant@golang.org>2020-12-07 10:45:52 -0800
committerIan Lance Taylor <iant@golang.org>2020-12-07 10:45:52 -0800
commit45c32be1f96ace25b66c34a84818dc5e07e9d516 (patch)
tree2a6658e3df17c11dd8d74d9c7403c9bc69678010 /gcc/common
parent945ae3ab27757d3261d99446f96105c5ebe70247 (diff)
parentb737b70fad398728f6006e8397d1bb31ccea4ce7 (diff)
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Merge from trunk revision b737b70fad398728f6006e8397d1bb31ccea4ce7.
Diffstat (limited to 'gcc/common')
-rw-r--r--gcc/common/config/i386/cpuinfo.h17
-rw-r--r--gcc/common/config/i386/i386-common.c16
-rw-r--r--gcc/common/config/i386/i386-cpuinfo.h2
3 files changed, 34 insertions, 1 deletions
diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
index 41728a2..4f1ab63 100644
--- a/gcc/common/config/i386/cpuinfo.h
+++ b/gcc/common/config/i386/cpuinfo.h
@@ -241,6 +241,23 @@ get_amd_cpu (struct __processor_model *cpu_model,
cpu_model->__cpu_subtype = AMDFAM17H_ZNVER1;
}
break;
+ case 0x19:
+ cpu_model->__cpu_type = AMDFAM19H;
+ /* AMD family 19h version 1. */
+ if (model <= 0x0f)
+ {
+ cpu = "znver3";
+ CHECK___builtin_cpu_is ("znver3");
+ cpu_model->__cpu_subtype = AMDFAM19H_ZNVER3;
+ }
+ else if (has_cpu_feature (cpu_model, cpu_features2,
+ FEATURE_VAES))
+ {
+ cpu = "znver3";
+ CHECK___builtin_cpu_is ("znver3");
+ cpu_model->__cpu_subtype = AMDFAM19H_ZNVER3;
+ }
+ break;
default:
break;
}
diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c
index 8f809c1..2a1d31f 100644
--- a/gcc/common/config/i386/i386-common.c
+++ b/gcc/common/config/i386/i386-common.c
@@ -1762,7 +1762,8 @@ const char *const processor_names[] =
"btver1",
"btver2",
"znver1",
- "znver2"
+ "znver2",
+ "znver3"
};
/* Guarantee that the array is aligned with enum processor_type. */
@@ -2004,6 +2005,17 @@ const pta processor_alias_table[] =
| PTA_SHA | PTA_LZCNT | PTA_POPCNT | PTA_CLWB | PTA_RDPID
| PTA_WBNOINVD,
M_CPU_SUBTYPE (AMDFAM17H_ZNVER2), P_PROC_AVX2},
+ {"znver3", PROCESSOR_ZNVER3, CPU_ZNVER3,
+ PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+ | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1
+ | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_AVX2
+ | PTA_BMI | PTA_BMI2 | PTA_F16C | PTA_FMA | PTA_PRFCHW
+ | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT | PTA_FSGSBASE
+ | PTA_RDRND | PTA_MOVBE | PTA_MWAITX | PTA_ADX | PTA_RDSEED
+ | PTA_CLZERO | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES
+ | PTA_SHA | PTA_LZCNT | PTA_POPCNT | PTA_CLWB | PTA_RDPID
+ | PTA_WBNOINVD | PTA_VAES | PTA_VPCLMULQDQ | PTA_PKU,
+ M_CPU_SUBTYPE (AMDFAM19H_ZNVER3), P_PROC_AVX2},
{"btver1", PROCESSOR_BTVER1, CPU_GENERIC,
PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
| PTA_SSSE3 | PTA_SSE4A | PTA_ABM | PTA_CX16 | PTA_PRFCHW
@@ -2030,6 +2042,8 @@ const pta processor_alias_table[] =
M_CPU_TYPE (AMDFAM15H), P_NONE},
{"amdfam17h", PROCESSOR_GENERIC, CPU_GENERIC, 0,
M_CPU_TYPE (AMDFAM17H), P_NONE},
+ {"amdfam19h", PROCESSOR_GENERIC, CPU_GENERIC, 0,
+ M_CPU_TYPE (AMDFAM19H), P_NONE},
{"shanghai", PROCESSOR_GENERIC, CPU_GENERIC, 0,
M_CPU_TYPE (AMDFAM10H_SHANGHAI), P_NONE},
{"istanbul", PROCESSOR_GENERIC, CPU_GENERIC, 0,
diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h
index af02be5..849e95a 100644
--- a/gcc/common/config/i386/i386-cpuinfo.h
+++ b/gcc/common/config/i386/i386-cpuinfo.h
@@ -55,6 +55,7 @@ enum processor_types
INTEL_GOLDMONT,
INTEL_GOLDMONT_PLUS,
INTEL_TREMONT,
+ AMDFAM19H,
CPU_TYPE_MAX,
BUILTIN_CPU_TYPE_MAX = CPU_TYPE_MAX
};
@@ -86,6 +87,7 @@ enum processor_subtypes
INTEL_COREI7_COOPERLAKE,
INTEL_COREI7_SAPPHIRERAPIDS,
INTEL_COREI7_ALDERLAKE,
+ AMDFAM19H_ZNVER3,
CPU_SUBTYPE_MAX
};