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| author | Pan Li <pan2.li@intel.com> | 2024-04-22 16:07:36 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2024-04-22 16:30:38 +0800 |
| commit | b991193eb8a79ec7562f3de3df866df9f041015a (patch) | |
| tree | b5d5da31295d4509640016f6796851c6b827b018 /gcc/common | |
| parent | 4df96b4ec788f2d588febf3555685f2700b932b3 (diff) | |
| download | gcc-b991193eb8a79ec7562f3de3df866df9f041015a.zip gcc-b991193eb8a79ec7562f3de3df866df9f041015a.tar.gz gcc-b991193eb8a79ec7562f3de3df866df9f041015a.tar.bz2 | |
RISC-V: Add xfail test case for highpart overlap floating-point widen insn
We reverted below patch for register group overlap, add the related
insn test and mark it as xfail. And we will remove the xfail
after we support the register overlap in GCC-15.
8614cbb2534 RISC-V: Support highpart overlap for floating-point widen instructions
The below test suites are passed.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr112431-10.c: New test.
* gcc.target/riscv/rvv/base/pr112431-11.c: New test.
* gcc.target/riscv/rvv/base/pr112431-12.c: New test.
* gcc.target/riscv/rvv/base/pr112431-13.c: New test.
* gcc.target/riscv/rvv/base/pr112431-14.c: New test.
* gcc.target/riscv/rvv/base/pr112431-15.c: New test.
* gcc.target/riscv/rvv/base/pr112431-7.c: New test.
* gcc.target/riscv/rvv/base/pr112431-8.c: New test.
* gcc.target/riscv/rvv/base/pr112431-9.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc/common')
0 files changed, 0 insertions, 0 deletions