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| author | Edwin Lu <ewlu@rivosinc.com> | 2024-02-07 16:30:28 -0800 |
|---|---|---|
| committer | Patrick O'Neill <patrick@rivosinc.com> | 2024-06-11 10:05:16 -0700 |
| commit | af139b3fc19fbdd7caa649bcb2cb75cc5a254143 (patch) | |
| tree | 7ddf9ca03b1cec9091fd092f9e45c3055ca576c5 /gcc/common | |
| parent | 05b95238be648c9cf8af2516930af6a7b637a2b8 (diff) | |
| download | gcc-af139b3fc19fbdd7caa649bcb2cb75cc5a254143.zip gcc-af139b3fc19fbdd7caa649bcb2cb75cc5a254143.tar.gz gcc-af139b3fc19fbdd7caa649bcb2cb75cc5a254143.tar.bz2 | |
RISC-V: Add basic Zaamo and Zalrsc support
There is a proposal to split the A extension into two parts: Zaamo and Zalrsc.
This patch adds basic support by making the A extension imply Zaamo and
Zalrsc.
Proposal: https://github.com/riscv/riscv-zaamo-zalrsc/tags
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc: Add Zaamo and Zalrsc.
* config/riscv/arch-canonicalize: Make A imply Zaamo and Zalrsc.
* config/riscv/riscv.opt: Add Zaamo and Zalrsc
* config/riscv/sync.md: Convert TARGET_ATOMIC to TARGET_ZAAMO and
TARGET_ZALRSC.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/attribute-15.c: Adjust expected arch string.
* gcc.target/riscv/attribute-16.c: Ditto.
* gcc.target/riscv/attribute-17.c: Ditto.
* gcc.target/riscv/attribute-18.c: Ditto.
* gcc.target/riscv/pr110696.c: Ditto.
* gcc.target/riscv/rvv/base/pr114352-1.c: Ditto.
* gcc.target/riscv/rvv/base/pr114352-3.c: Ditto.
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
Co-authored-by: Patrick O'Neill <patrick@rivosinc.com>
Diffstat (limited to 'gcc/common')
| -rw-r--r-- | gcc/common/config/riscv/riscv-common.cc | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc index 8820439..78dfd6b 100644 --- a/gcc/common/config/riscv/riscv-common.cc +++ b/gcc/common/config/riscv/riscv-common.cc @@ -79,6 +79,9 @@ static const riscv_implied_info_t riscv_implied_info[] = {"f", "zicsr"}, {"d", "zicsr"}, + {"a", "zaamo"}, + {"a", "zalrsc"}, + {"zdinx", "zfinx"}, {"zfinx", "zicsr"}, {"zdinx", "zicsr"}, @@ -255,6 +258,8 @@ static const struct riscv_ext_version riscv_ext_version_table[] = {"za64rs", ISA_SPEC_CLASS_NONE, 1, 0}, {"za128rs", ISA_SPEC_CLASS_NONE, 1, 0}, {"zawrs", ISA_SPEC_CLASS_NONE, 1, 0}, + {"zaamo", ISA_SPEC_CLASS_NONE, 1, 0}, + {"zalrsc", ISA_SPEC_CLASS_NONE, 1, 0}, {"zba", ISA_SPEC_CLASS_NONE, 1, 0}, {"zbb", ISA_SPEC_CLASS_NONE, 1, 0}, @@ -1616,9 +1621,11 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] = {"zifencei", &gcc_options::x_riscv_zi_subext, MASK_ZIFENCEI}, {"zicond", &gcc_options::x_riscv_zi_subext, MASK_ZICOND}, - {"za64rs", &gcc_options::x_riscv_za_subext, MASK_ZA64RS}, + {"za64rs", &gcc_options::x_riscv_za_subext, MASK_ZA64RS}, {"za128rs", &gcc_options::x_riscv_za_subext, MASK_ZA128RS}, - {"zawrs", &gcc_options::x_riscv_za_subext, MASK_ZAWRS}, + {"zawrs", &gcc_options::x_riscv_za_subext, MASK_ZAWRS}, + {"zaamo", &gcc_options::x_riscv_za_subext, MASK_ZAAMO}, + {"zalrsc", &gcc_options::x_riscv_za_subext, MASK_ZALRSC}, {"zba", &gcc_options::x_riscv_zb_subext, MASK_ZBA}, {"zbb", &gcc_options::x_riscv_zb_subext, MASK_ZBB}, |