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author | Haochen Jiang <haochen.jiang@intel.com> | 2024-11-01 10:04:34 +0800 |
---|---|---|
committer | Haochen Jiang <haochen.jiang@intel.com> | 2024-11-01 10:09:36 +0800 |
commit | 343f8113385d00e9ffac53150bca4f78be30e19c (patch) | |
tree | b2838f3b54b157cc20dc0f8f349ef924b3fa1c9e /gcc/common | |
parent | 8ee5cd4b84489bee0f72153e96a9afe9493e170d (diff) | |
download | gcc-343f8113385d00e9ffac53150bca4f78be30e19c.zip gcc-343f8113385d00e9ffac53150bca4f78be30e19c.tar.gz gcc-343f8113385d00e9ffac53150bca4f78be30e19c.tar.bz2 |
Support Intel AMX-AVX512
gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_available_features):
Detect AMX-AVX512.
* common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_AVX512_SET,
OPTION_MASK_ISA2_AMX_AVX512_UNSET): New.
(ix86_handle_option): Handle -mamx-avx512.
* common/config/i386/i386-cpuinfo.h (enum processor_features):
Add FEATURE_AMX_AVX512.
* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
amx-avx512.
* config.gcc: Add amxavx512intrin.h
* config/i386/cpuid.h (bit_AMX_AVX512): New.
* config/i386/i386-c.cc (ix86_target_macros_internal):
Handle amx-avx512.
* config/i386/i386-isa.def (AMX_AVX512): Add DEF_PTA(AMX_AVX512).
* config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
Handle amx-avx512.
* config/i386/i386.opt: Add option -mamx-avx512.
* config/i386/i386.opt.urls: Regenerated.
* config/i386/immintrin.h: Include amxavx512intrin.h
* doc/extend.texi: Document amx-avx512.
* doc/invoke.texi: Document -mamx-avx512.
* doc/sourcebuild.texi: Document target amx-avx512.
* config/i386/amxavx512intrin.h: New file.
gcc/testsuite/ChangeLog:
* g++.dg/other/i386-2.C: Add -mamx-avx512.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/amx-check.h: Add cpu check for AMX-AVX512.
* gcc.target/i386/amx-helper.h: Support amx-avx512.
* gcc.target/i386/funcspec-56.inc: Add new target attribute.
* gcc.target/i386/sse-12.c: Add -mamx-avx512.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Add amx-avx512.
* gcc.target/i386/sse-23.c: Ditto.
* lib/target-supports.exp (check_effective_target_amx_avx512): New.
* gcc.target/i386/amxavx512-asmatt-1.c: New test.
* gcc.target/i386/amxavx512-asmintel-1.c: Ditto.
* gcc.target/i386/amxavx512-cvtrowd2ps-2.c: Ditto.
* gcc.target/i386/amxavx512-cvtrowps2pbf16-2.c: Ditto.
* gcc.target/i386/amxavx512-cvtrowps2ph-2.c: Ditto.
* gcc.target/i386/amxavx512-movrow-2.c: Ditto.
Co-authored-by: Yu, Bing <bing1.yu@intel.com>
Diffstat (limited to 'gcc/common')
-rw-r--r-- | gcc/common/config/i386/cpuinfo.h | 11 | ||||
-rw-r--r-- | gcc/common/config/i386/i386-common.cc | 24 | ||||
-rw-r--r-- | gcc/common/config/i386/i386-cpuinfo.h | 1 | ||||
-rw-r--r-- | gcc/common/config/i386/i386-isas.h | 2 |
4 files changed, 36 insertions, 2 deletions
diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index e3eb6e9..67724c3 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -995,6 +995,17 @@ get_available_features (struct __processor_model *cpu_model, } } + /* Get Advanced Features at level 0x1e (eax = 0x1e, ecx = 1). */ + if (max_cpuid_level >= 0x1e) + { + __cpuid_count (0x1e, 1, eax, ebx, ecx, edx); + if (amx_usable) + { + if (eax & bit_AMX_AVX512) + set_feature (FEATURE_AMX_AVX512); + } + } + /* Get Advanced Features at level 0x24 (eax = 0x24, ecx = 0). */ if (avx10_set && max_cpuid_level >= 0x24) { diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index 4a213f5..e8e3eb1 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -127,6 +127,9 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA2_AVX10_2_512_SET \ (OPTION_MASK_ISA2_AVX10_1_512_SET | OPTION_MASK_ISA2_AVX10_2_256_SET \ | OPTION_MASK_ISA2_AVX10_2_512) +#define OPTION_MASK_ISA2_AMX_AVX512_SET \ + (OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AVX10_2_512_SET \ + | OPTION_MASK_ISA2_AMX_AVX512) /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same as -msse4.2. */ @@ -289,7 +292,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA2_AMX_TILE_UNSET \ (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_INT8_UNSET \ | OPTION_MASK_ISA2_AMX_BF16_UNSET | OPTION_MASK_ISA2_AMX_FP16_UNSET \ - | OPTION_MASK_ISA2_AMX_COMPLEX_UNSET) + | OPTION_MASK_ISA2_AMX_COMPLEX_UNSET | OPTION_MASK_ISA2_AMX_AVX512_UNSET) #define OPTION_MASK_ISA2_AMX_INT8_UNSET OPTION_MASK_ISA2_AMX_INT8 #define OPTION_MASK_ISA2_AMX_BF16_UNSET OPTION_MASK_ISA2_AMX_BF16 #define OPTION_MASK_ISA2_UINTR_UNSET OPTION_MASK_ISA2_UINTR @@ -317,7 +320,9 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA2_AVX10_1_512_UNSET \ (OPTION_MASK_ISA2_AVX10_1_512 | OPTION_MASK_ISA2_AVX10_2_512_UNSET) #define OPTION_MASK_ISA2_AVX10_2_256_UNSET OPTION_MASK_ISA2_AVX10_2_256 -#define OPTION_MASK_ISA2_AVX10_2_512_UNSET OPTION_MASK_ISA2_AVX10_2_512 +#define OPTION_MASK_ISA2_AVX10_2_512_UNSET \ + (OPTION_MASK_ISA2_AVX10_2_512 | OPTION_MASK_ISA2_AMX_AVX512_UNSET) +#define OPTION_MASK_ISA2_AMX_AVX512_UNSET OPTION_MASK_ISA2_AMX_AVX512 /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same as -mno-sse4.1. */ @@ -1409,6 +1414,21 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_mamx_avx512: + if (value) + { + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AMX_AVX512_SET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AMX_AVX512_SET; + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET; + } + else + { + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AMX_AVX512_UNSET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AMX_AVX512_UNSET; + } + return true; + case OPT_mfma: if (value) { diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h index b573166..cc5bb0d 100644 --- a/gcc/common/config/i386/i386-cpuinfo.h +++ b/gcc/common/config/i386/i386-cpuinfo.h @@ -269,6 +269,7 @@ enum processor_features FEATURE_AVX10_1_512, FEATURE_AVX10_2_256, FEATURE_AVX10_2_512, + FEATURE_AMX_AVX512, CPU_FEATURE_MAX }; diff --git a/gcc/common/config/i386/i386-isas.h b/gcc/common/config/i386/i386-isas.h index a7c7e63..7ea852a 100644 --- a/gcc/common/config/i386/i386-isas.h +++ b/gcc/common/config/i386/i386-isas.h @@ -189,4 +189,6 @@ ISA_NAMES_TABLE_START ISA_NAMES_TABLE_ENTRY("avx10.2", FEATURE_AVX10_2_256, P_NONE, "-mavx10.2") ISA_NAMES_TABLE_ENTRY("avx10.2-256", FEATURE_AVX10_2_256, P_NONE, "-mavx10.2-256") ISA_NAMES_TABLE_ENTRY("avx10.2-512", FEATURE_AVX10_2_512, P_NONE, "-mavx10.2-512") + ISA_NAMES_TABLE_ENTRY("amx-avx512", FEATURE_AMX_AVX512, P_NONE, + "-mamx-avx512") ISA_NAMES_TABLE_END |