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| author | Haochen Jiang <haochen.jiang@intel.com> | 2024-07-09 16:31:02 +0800 |
|---|---|---|
| committer | Haochen Jiang <haochen.jiang@intel.com> | 2024-07-09 16:50:12 +0800 |
| commit | 298a576f00c49b8f4529ea2f87b9943a32743250 (patch) | |
| tree | 6a1464079932a8ecfb46185cc74f4a3f456cf66e /gcc/common | |
| parent | 4f767174b83027091f0e84b4ddb9a6370e549ffd (diff) | |
| download | gcc-298a576f00c49b8f4529ea2f87b9943a32743250.zip gcc-298a576f00c49b8f4529ea2f87b9943a32743250.tar.gz gcc-298a576f00c49b8f4529ea2f87b9943a32743250.tar.bz2 | |
i386: Correct AVX10 CPUID emulation
AVX10 Documentaion has specified ecx value as 0 for AVX10 version and
vector size under 0x24 subleaf. Although for ecx=1, the bits are all
reserved for now, we still need to specify ecx as 0 to avoid dirty
value in ecx.
gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_available_features): Correct
AVX10 CPUID emulation to specify ecx value.
Diffstat (limited to 'gcc/common')
| -rw-r--r-- | gcc/common/config/i386/cpuinfo.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index 9360397..2ae77d3 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -998,10 +998,10 @@ get_available_features (struct __processor_model *cpu_model, } } - /* Get Advanced Features at level 0x24 (eax = 0x24). */ + /* Get Advanced Features at level 0x24 (eax = 0x24, ecx = 0). */ if (avx10_set && max_cpuid_level >= 0x24) { - __cpuid (0x24, eax, ebx, ecx, edx); + __cpuid_count (0x24, 0, eax, ebx, ecx, edx); version = ebx & 0xff; if (ebx & bit_AVX10_256) switch (version) |