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author | Christophe Lyon <christophe.lyon@arm.com> | 2023-02-08 15:04:33 +0000 |
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committer | Christophe Lyon <christophe.lyon@arm.com> | 2023-05-05 16:11:59 +0200 |
commit | 7e6c39a327dae93fdcac9c9c87b200ee55df3e6d (patch) | |
tree | 2b5cd2ebe9daf2bc0e51a4852329b19d41d6bd1b /gcc/combine.cc | |
parent | 548e0613198fea9bc7bb79b1d8076416e539a590 (diff) | |
download | gcc-7e6c39a327dae93fdcac9c9c87b200ee55df3e6d.zip gcc-7e6c39a327dae93fdcac9c9c87b200ee55df3e6d.tar.gz gcc-7e6c39a327dae93fdcac9c9c87b200ee55df3e6d.tar.bz2 |
arm: [MVE intrinsics] factorize vqshlq vshlq
Factorize vqshlq and vshlq so that they use the same pattern.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
(MVE_SHIFT_N, MVE_SHIFT_R): New.
(mve_insn): Add vqshl, vshl.
* config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
(mve_vshlq_n_<supf><mode>): Merge into ...
(@mve_<mve_insn>q_n_<supf><mode>): ... this.
(mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
...
(@mve_<mve_insn>q_r_<supf><mode>): ... this.
(mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
into ...
(@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
(mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
into ...
(@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
* config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.
Diffstat (limited to 'gcc/combine.cc')
0 files changed, 0 insertions, 0 deletions