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authorRoger Sayle <roger@nextmovesoftware.com>2022-04-06 07:15:31 +0100
committerRoger Sayle <roger@nextmovesoftware.com>2022-04-06 07:19:08 +0100
commit6d4bbee4f59c7102f8ed9b6774f0b2d9f6ff4365 (patch)
tree72195b452667579281249d309b0103e71d6e9990 /gcc/combine.cc
parentfc8d9e4497032dd295aac9414042163f92250b77 (diff)
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Support pandn for V1TI mode (i.e. *andnotv1ti3).
This simple patch allows the i386 backend to generate pandn instructions for V1TI mode. Currently, the testcase: typedef unsigned __int128 v1ti __attribute__ ((__vector_size__ (16))); v1ti andnot1(v1ti x, v1ti y) { return ~x & y; } generates with -O2 pcmpeqd %xmm2, %xmm2 pxor %xmm2, %xmm0 pand %xmm1, %xmm0 ret with this patch, we now generate: pandn %xmm1, %xmm0 ret It turns out that there are currently three (near) duplicates of the logic for andn/pandn/vandn/vpandn in i386/sse.md: one for floating point vectors (MODEF), one for integer vectors (VI) and a third for TFmode. Rather than introduce a fourth copy, this patch introduces a new mode iterator to share/reuse the TFmode define_insn to also handle V1TI. 2022-04-06 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog * config/i386/sse.md (ANDNOT_MODE): New mode iterator for TF and V1TI. (*andnottf3): Replace with... (*andnot<mode>3): New define_insn using ANDNOT_MODE. gcc/testsuite/ChangeLog * gcc.target/i386/sse2-v1ti-andnot.c: New test case.
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