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| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-05-30 10:20:19 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-05-30 10:20:19 +0800 |
| commit | 52577a301ef1b86d0a3fda9fed2477b4d46a124a (patch) | |
| tree | 370cc4fa9d1ae979bf4ab2240f7fd853796b8575 /gcc/combine.cc | |
| parent | b1b92e72cdad1dc51058a26f1dadddd406fb8472 (diff) | |
| download | gcc-52577a301ef1b86d0a3fda9fed2477b4d46a124a.zip gcc-52577a301ef1b86d0a3fda9fed2477b4d46a124a.tar.gz gcc-52577a301ef1b86d0a3fda9fed2477b4d46a124a.tar.bz2 | |
RISC-V: Add floating-point to integer conversion RVV auto-vectorization support
Even though we can't support floating-point operations which are
depending
on FRM yet, (for example vfadd support is blocked) since the RVV
intrinsic doc is not updated
and we can't support mode switching for this.
We can support floating-point to integer conversion now since it's not
depending on FRM and
we don't need mode switching support for this ('rtz' conversions
independent FRM).
Signed-off-by: Juzhe-Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:
* config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
* config/riscv/iterators.md: New attribute.
* config/riscv/vector-iterators.md: New attribute.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-run.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-rv32gcv.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-rv64gcv.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-template.h: New test.
Diffstat (limited to 'gcc/combine.cc')
0 files changed, 0 insertions, 0 deletions