aboutsummaryrefslogtreecommitdiff
path: root/gcc/combine.c
diff options
context:
space:
mode:
authorJakub Jelinek <jakub@redhat.com>2010-09-13 23:00:03 +0200
committerJakub Jelinek <jakub@gcc.gnu.org>2010-09-13 23:00:03 +0200
commitef3be7da315db90f5d311b43464c5341fa33d5e2 (patch)
tree142dc459a1da90111739127e8c28d54c9c9564e9 /gcc/combine.c
parentfa0921fcd0c899546fe2d4f6f4cee0ab01ea97eb (diff)
downloadgcc-ef3be7da315db90f5d311b43464c5341fa33d5e2.zip
gcc-ef3be7da315db90f5d311b43464c5341fa33d5e2.tar.gz
gcc-ef3be7da315db90f5d311b43464c5341fa33d5e2.tar.bz2
re PR rtl-optimization/45617 (optimize bit shift+compare at RTL level)
PR rtl-optimization/45617 * combine.c (simplify_comparison): Optimize (X >> N) {>,>=,<,<=} C even if low N bits of X aren't known to be zero. * gcc.target/i386/pr45617.c: New test. From-SVN: r164257
Diffstat (limited to 'gcc/combine.c')
-rw-r--r--gcc/combine.c39
1 files changed, 26 insertions, 13 deletions
diff --git a/gcc/combine.c b/gcc/combine.c
index bed5768..618e07d 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -11773,13 +11773,14 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
/* If we have (compare (xshiftrt FOO N) (const_int C)) and
the low order N bits of FOO are known to be zero, we can do this
by comparing FOO with C shifted left N bits so long as no
- overflow occurs. */
+ overflow occurs. Even if the low order N bits of FOO aren't known
+ to be zero, if the comparison is >= or < we can use the same
+ optimization and for > or <= by setting all the low
+ order N bits in the comparison constant. */
if (CONST_INT_P (XEXP (op0, 1))
- && INTVAL (XEXP (op0, 1)) >= 0
+ && INTVAL (XEXP (op0, 1)) > 0
&& INTVAL (XEXP (op0, 1)) < HOST_BITS_PER_WIDE_INT
&& mode_width <= HOST_BITS_PER_WIDE_INT
- && (nonzero_bits (XEXP (op0, 0), mode)
- & (((HOST_WIDE_INT) 1 << INTVAL (XEXP (op0, 1))) - 1)) == 0
&& (((unsigned HOST_WIDE_INT) const_op
+ (GET_CODE (op0) != LSHIFTRT
? ((GET_MODE_MASK (mode) >> INTVAL (XEXP (op0, 1)) >> 1)
@@ -11787,15 +11788,27 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
: 0))
<= GET_MODE_MASK (mode) >> INTVAL (XEXP (op0, 1))))
{
- /* If the shift was logical, then we must make the condition
- unsigned. */
- if (GET_CODE (op0) == LSHIFTRT)
- code = unsigned_condition (code);
-
- const_op <<= INTVAL (XEXP (op0, 1));
- op1 = GEN_INT (const_op);
- op0 = XEXP (op0, 0);
- continue;
+ unsigned HOST_WIDE_INT low_bits
+ = (nonzero_bits (XEXP (op0, 0), mode)
+ & (((unsigned HOST_WIDE_INT) 1
+ << INTVAL (XEXP (op0, 1))) - 1));
+ if (low_bits == 0 || !equality_comparison_p)
+ {
+ /* If the shift was logical, then we must make the condition
+ unsigned. */
+ if (GET_CODE (op0) == LSHIFTRT)
+ code = unsigned_condition (code);
+
+ const_op <<= INTVAL (XEXP (op0, 1));
+ if (low_bits != 0
+ && (code == GT || code == GTU
+ || code == LE || code == LEU))
+ const_op
+ |= (((HOST_WIDE_INT) 1 << INTVAL (XEXP (op0, 1))) - 1);
+ op1 = GEN_INT (const_op);
+ op0 = XEXP (op0, 0);
+ continue;
+ }
}
/* If we are using this shift to extract just the sign bit, we