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| author | Alan Lawrence <alan.lawrence@arm.com> | 2014-09-23 18:48:50 +0000 |
|---|---|---|
| committer | Alan Lawrence <alalaw01@gcc.gnu.org> | 2014-09-23 18:48:50 +0000 |
| commit | ed052e94aa6ed5dba5e0cdbcc6598e26c01a4155 (patch) | |
| tree | 47cef1bb0f85000c179234d0ef6b784b47d581b6 /gcc/combine.c | |
| parent | 43b1b9edfcd5aeb8fe5ca012c81cdd8d4259de04 (diff) | |
| download | gcc-ed052e94aa6ed5dba5e0cdbcc6598e26c01a4155.zip gcc-ed052e94aa6ed5dba5e0cdbcc6598e26c01a4155.tar.gz gcc-ed052e94aa6ed5dba5e0cdbcc6598e26c01a4155.tar.bz2 | |
Relax check against commuting XOR and ASHIFTRT in combine.c
gcc/:
* combine.c (simplify_shift_const_1): Allow commuting (ashiftrt (xor))
when result_mode == shift_mode.
gcc/testsuite/:
* gcc.dg/combine_ashiftrt_1.c: New test.
* gcc.dg/combine_ashiftrt_2.c: Likewise.
* gcc.target/aarch64/singleton_intrinsics_1.c: Remove scan-assembler
workarounds for cmge.
* gcc.target/aarch64/simd/int_comparisons_1.c: Likewise; also check for
absence of mvn.
From-SVN: r215531
Diffstat (limited to 'gcc/combine.c')
| -rw-r--r-- | gcc/combine.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/gcc/combine.c b/gcc/combine.c index 1328486..1457eab 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -10255,8 +10255,10 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode, if (CONST_INT_P (XEXP (varop, 1)) /* We can't do this if we have (ashiftrt (xor)) and the - constant has its sign bit set in shift_mode. */ + constant has its sign bit set in shift_mode with shift_mode + wider than result_mode. */ && !(code == ASHIFTRT && GET_CODE (varop) == XOR + && result_mode != shift_mode && 0 > trunc_int_for_mode (INTVAL (XEXP (varop, 1)), shift_mode)) && (new_rtx = simplify_const_binary_operation @@ -10273,10 +10275,12 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode, /* If we can't do that, try to simplify the shift in each arm of the logical expression, make a new logical expression, and apply - the inverse distributive law. This also can't be done - for some (ashiftrt (xor)). */ + the inverse distributive law. This also can't be done for + (ashiftrt (xor)) where we've widened the shift and the constant + changes the sign bit. */ if (CONST_INT_P (XEXP (varop, 1)) && !(code == ASHIFTRT && GET_CODE (varop) == XOR + && result_mode != shift_mode && 0 > trunc_int_for_mode (INTVAL (XEXP (varop, 1)), shift_mode))) { |