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| author | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2015-11-13 15:12:26 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2015-11-13 15:12:26 +0000 |
| commit | e5b2900e37366b5da63c85c2005e33158817bd60 (patch) | |
| tree | 293f945582a8472048901e812fed95ac9e080b60 /gcc/combine.c | |
| parent | dd3c1b14afa954856789c4cb955dec474d799edd (diff) | |
| download | gcc-e5b2900e37366b5da63c85c2005e33158817bd60.zip gcc-e5b2900e37366b5da63c85c2005e33158817bd60.tar.gz gcc-e5b2900e37366b5da63c85c2005e33158817bd60.tar.bz2 | |
[combine] Don't transform sign and zero extends inside mults
2015-11-13 Segher Boessenkool <segher@kernel.crashing.org>
Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* combine.c (subst): Don't substitute or simplify when
handling register-wise widening multiply.
(force_to_mode): Likewise.
* gcc.target/aarch64/umaddl_combine_1.c: New test.
From-SVN: r230326
Diffstat (limited to 'gcc/combine.c')
| -rw-r--r-- | gcc/combine.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/gcc/combine.c b/gcc/combine.c index c3db2e0..2a66fd5 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -5284,6 +5284,22 @@ subst (rtx x, rtx from, rtx to, int in_dest, int in_cond, int unique_copy) || GET_CODE (SET_DEST (x)) == PC)) fmt = "ie"; + /* Substituting into the operands of a widening MULT is not likely + to create RTL matching a machine insn. */ + if (code == MULT + && (GET_CODE (XEXP (x, 0)) == ZERO_EXTEND + || GET_CODE (XEXP (x, 0)) == SIGN_EXTEND) + && (GET_CODE (XEXP (x, 1)) == ZERO_EXTEND + || GET_CODE (XEXP (x, 1)) == SIGN_EXTEND) + && REG_P (XEXP (XEXP (x, 0), 0)) + && REG_P (XEXP (XEXP (x, 1), 0))) + { + if (from == to) + return x; + else + return gen_rtx_CLOBBER (GET_MODE (x), const0_rtx); + } + /* Get the mode of operand 0 in case X is now a SIGN_EXTEND of a constant. */ if (fmt[0] == 'e') @@ -8455,6 +8471,17 @@ force_to_mode (rtx x, machine_mode mode, unsigned HOST_WIDE_INT mask, /* ... fall through ... */ case MULT: + /* Substituting into the operands of a widening MULT is not likely to + create RTL matching a machine insn. */ + if (code == MULT + && (GET_CODE (XEXP (x, 0)) == ZERO_EXTEND + || GET_CODE (XEXP (x, 0)) == SIGN_EXTEND) + && (GET_CODE (XEXP (x, 1)) == ZERO_EXTEND + || GET_CODE (XEXP (x, 1)) == SIGN_EXTEND) + && REG_P (XEXP (XEXP (x, 0), 0)) + && REG_P (XEXP (XEXP (x, 1), 0))) + return gen_lowpart_or_truncate (mode, x); + /* For PLUS, MINUS and MULT, we need any bits less significant than the most significant bit in MASK since carries from those bits will affect the bits we are interested in. */ |