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author | Senthil Kumar Selvaraj <senthilkumar.selvaraj@microchip.com> | 2018-12-17 10:50:54 +0000 |
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committer | Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org> | 2018-12-17 10:50:54 +0000 |
commit | d7c00826362598d636ef1eb92a1b194d46b41473 (patch) | |
tree | 8259daac4937112ea61012e745a20a8d4140b029 /gcc/combine.c | |
parent | 13e08dc93941675cd6a7cf5470b437c4f640c996 (diff) | |
download | gcc-d7c00826362598d636ef1eb92a1b194d46b41473.zip gcc-d7c00826362598d636ef1eb92a1b194d46b41473.tar.gz gcc-d7c00826362598d636ef1eb92a1b194d46b41473.tar.bz2 |
re PR rtl-optimization/88253 (Inlining of function incorrectly deletes volatile register access when using XOR in avr-gcc)
Fix PR 88253
gcc/ChangeLog:
PR rtl-optimization/88253
* combine.c (combine_simplify_rtx): Test for side-effects before
substituting by zero.
gcc/testsuite/ChangeLog:
PR rtl-optimization/88253
* gcc.target/avr/pr88253.c: New test.
From-SVN: r267198
Diffstat (limited to 'gcc/combine.c')
-rw-r--r-- | gcc/combine.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/gcc/combine.c b/gcc/combine.c index 7e61139..220c3a4 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -5978,8 +5978,9 @@ combine_simplify_rtx (rtx x, machine_mode op0_mode, int in_dest, && known_eq (subreg_lowpart_offset (int_mode, int_op0_mode), SUBREG_BYTE (x)) && HWI_COMPUTABLE_MODE_P (int_op0_mode) - && (nonzero_bits (SUBREG_REG (x), int_op0_mode) - & GET_MODE_MASK (int_mode)) == 0) + && ((nonzero_bits (SUBREG_REG (x), int_op0_mode) + & GET_MODE_MASK (int_mode)) == 0) + && !side_effects_p (SUBREG_REG (x))) return CONST0_RTX (int_mode); } |