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| author | Max Filippov <jcmvbkbc@gmail.com> | 2015-01-05 22:22:36 +0000 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gcc.gnu.org> | 2015-01-05 22:22:36 +0000 |
| commit | c68360000ce964b0de6e333817c8b74a12deda3e (patch) | |
| tree | f827ae6336f5fcc1be38eced868099ac103b7e4c /gcc/combine.c | |
| parent | 389d63bb1ec188038162e599ca21cd5d72af219b (diff) | |
| download | gcc-c68360000ce964b0de6e333817c8b74a12deda3e.zip gcc-c68360000ce964b0de6e333817c8b74a12deda3e.tar.gz gcc-c68360000ce964b0de6e333817c8b74a12deda3e.tar.bz2 | |
Fix loop optimization when ZOL is not available in xtensa configuration
Currently building gcc for xtensa configuration with XCHAL_HAVE_LOOPS
set to 0 fails with the following error:
xtensa.c:3952: undefined reference to `reorg_loops(bool, hw_doloop_hooks*)'
Only compile target-specific zero-overhead loop optimization code when
TARGET_LOOPS allows it.
2014-12-30 Max Filippov <jcmvbkbc@gmail.com>
* config/xtensa/xtensa.c (hwloop_optimize, hwloop_fail,
hwloop_pattern_reg, xtensa_doloop_hooks, xtensa_reorg_loops):
put under #if TARGET_LOOPS guard.
From-SVN: r219206
Diffstat (limited to 'gcc/combine.c')
0 files changed, 0 insertions, 0 deletions