explow.c (trunc_int_for_mode): New function.

        * explow.c (trunc_int_for_mode): New function.
        (plus_constant_wide): Use it.
        * combine.c (simplify_and_const_int): Likewise.
        (merge_outer_ops): Likewise.
        (simplify_shift_const): Likewise.
        * cse.c (simplify_unary_operation): Likewise.
        (simplify_binary_operation): Likewise.
        * emit-rtl.c (operand_subword): Likewise.
        * rtl.h: Declare it.

From-SVN: r28222

1 files changed, 6 insertions, 43 deletions

diff --git a/gcc/combine.c b/gcc/combine.c
index 60e0ef2..c9736e5 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -7336,19 +7336,7 @@ simplify_and_const_int (x, mode, varop, constop)
      MODE.  */
 
   nonzero = nonzero_bits (varop, mode) & GET_MODE_MASK (mode);
-
-  /* If this would be an entire word for the target, but is not for
-     the host, then sign-extend on the host so that the number will look
-     the same way on the host that it would on the target.
-
-     For example, when building a 64 bit alpha hosted 32 bit sparc
-     targeted compiler, then we want the 32 bit unsigned value -1 to be
-     represented as a 64 bit value -1, and not as 0x00000000ffffffff.
-     The later confuses the sparc backend.  */
-
-  if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
-      && (nonzero & ((HOST_WIDE_INT) 1 << (width - 1))))
-    nonzero |= ((HOST_WIDE_INT) (-1) << width);
+  nonzero = trunc_int_for_mode (nonzero, mode);
 
   /* Turn off all bits in the constant that are known to already be zero.
      Thus, if the AND isn't needed at all, we will have CONSTOP == NONZERO_BITS
@@ -8327,18 +8315,10 @@ merge_outer_ops (pop0, pconst0, op1, const1, mode, pcomp_p)
 	   && op0 == AND)
     op0 = NIL;
 
-  /* If this would be an entire word for the target, but is not for
-     the host, then sign-extend on the host so that the number will look
-     the same way on the host that it would on the target.
-
-     For example, when building a 64 bit alpha hosted 32 bit sparc
-     targeted compiler, then we want the 32 bit unsigned value -1 to be
-     represented as a 64 bit value -1, and not as 0x00000000ffffffff.
-     The later confuses the sparc backend.  */
-
-  if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
-      && (const0 & ((HOST_WIDE_INT) 1 << (width - 1))))
-    const0 |= ((HOST_WIDE_INT) (-1) << width);
+  /* ??? Slightly redundant with the above mask, but not entirely.
+     Moving this above means we'd have to sign-extend the mode mask
+     for the final test.  */
+  const0 = trunc_int_for_mode (const0, mode);
 
   *pop0 = op0;
   *pconst0 = const0;
@@ -9053,24 +9033,7 @@ simplify_shift_const (x, code, result_mode, varop, count)
   if (outer_op != NIL)
     {
       if (GET_MODE_BITSIZE (result_mode) < HOST_BITS_PER_WIDE_INT)
-	{
-	  int width = GET_MODE_BITSIZE (result_mode);
-
-	  outer_const &= GET_MODE_MASK (result_mode);
-
-	  /* If this would be an entire word for the target, but is not for
-	     the host, then sign-extend on the host so that the number will
-	     look the same way on the host that it would on the target.
-
-	     For example, when building a 64 bit alpha hosted 32 bit sparc
-	     targeted compiler, then we want the 32 bit unsigned value -1 to be
-	     represented as a 64 bit value -1, and not as 0x00000000ffffffff.
-	     The later confuses the sparc backend.  */
-
-	  if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
-	      && (outer_const & ((HOST_WIDE_INT) 1 << (width - 1))))
-	    outer_const |= ((HOST_WIDE_INT) (-1) << width);
-	}
+	outer_const = trunc_int_for_mode (outer_const, result_mode);
 
       if (outer_op == AND)
 	x = simplify_and_const_int (NULL_RTX, result_mode, x, outer_const);