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| author | Mihailo Stojanovic <mihailo.stojanovic@typhoon-hil.com> | 2021-03-30 11:42:49 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2021-03-30 11:42:49 +0100 |
| commit | cc2fda1328ee69b92724d6b3cffb741f07d86047 (patch) | |
| tree | 30b6f64d73005f89b36823472d6f66df2b986a7a /gcc/cgraphclones.c | |
| parent | 65374af219f9c5c594951a07e766fe70c1136a1f (diff) | |
| download | gcc-cc2fda1328ee69b92724d6b3cffb741f07d86047.zip gcc-cc2fda1328ee69b92724d6b3cffb741f07d86047.tar.gz gcc-cc2fda1328ee69b92724d6b3cffb741f07d86047.tar.bz2 | |
aarch64: Prevent use of SIMD fcvtz[su] instruction variant with "nosimd"
Currently, SF->SI and DF->DI conversions on Aarch64 with the "nosimd"
flag provided sometimes cause the emitting of a vector variant of the
fcvtz[su] instruction (e.g. fcvtzu s0, s0).
This modifies the corresponding pattern to only select the vector
variant of the instruction when generating code with SIMD enabled.
gcc/ChangeLog:
* config/aarch64/aarch64.md
(<optab>_trunc<fcvt_target><GPI:mode>2): Set the "arch"
attribute to disambiguate between SIMD and FP variants of the
instruction.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/fcvt_nosimd.c: New test.
Diffstat (limited to 'gcc/cgraphclones.c')
0 files changed, 0 insertions, 0 deletions