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authorKyrylo Tkachov <kyrylo.tkachov@arm.com>2021-03-30 15:43:36 +0100
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>2021-03-30 15:43:36 +0100
commit19199a6f2b0f4ce4b100856c78706d56a16b1956 (patch)
treef2d8b40b2c33cc40cd67c9bac772184ed94315b5 /gcc/cgraphclones.c
parentf64b91568f3ac8f152c6c617b4fcc6b51da10ac4 (diff)
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aarch64: PR target/99822 Don't allow zero register in first operand of SUBS/ADDS-immediate
In this PR we end up generating an invalid instruction: adds x1,xzr,#2 because the pattern accepts zero as an operand in the comparison, but the instruction doesn't. Fix it by adjusting the predicate and constraints. gcc/ChangeLog: PR target/99822 * config/aarch64/aarch64.md (sub<mode>3_compare1_imm): Do not allow zero in operand 1. gcc/testsuite/ChangeLog: PR target/99822 * gcc.c-torture/compile/pr99822.c: New test.
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