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| author | liuhongt <hongtao.liu@intel.com> | 2021-11-29 10:01:42 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2021-11-29 17:46:00 +0800 |
| commit | 11d0a2af33910c6d243e7265fb7ea04d2bc89b25 (patch) | |
| tree | 7440f7df96b33f56d7fec5987da2a6e0b1e3899c /gcc/c | |
| parent | 9519b694afbf9a35c36cf9f14d35d1c0e9e8cacc (diff) | |
| download | gcc-11d0a2af33910c6d243e7265fb7ea04d2bc89b25.zip gcc-11d0a2af33910c6d243e7265fb7ea04d2bc89b25.tar.gz gcc-11d0a2af33910c6d243e7265fb7ea04d2bc89b25.tar.bz2 | |
Optimize _Float16 usage for non AVX512FP16.
1. No memory is needed to move HI/HFmode between GPR and SSE registers
under TARGET_SSE2 and above, pinsrw/pextrw are used for them w/o
AVX512FP16.
2. Use gen_sse2_pinsrph/gen_vec_setv4sf_0 to replace
ix86_expand_vector_set in extendhfsf2/truncsfhf2 so that redundant
initialization cound be eliminated.
gcc/ChangeLog:
PR target/102811
* config/i386/i386.c (inline_secondary_memory_needed): HImode
move between GPR and SSE registers is supported under
TARGET_SSE2 and above.
* config/i386/i386.md (extendhfsf2): Optimize expander.
(truncsfhf2): Ditto.
* config/i386/sse.md (sse2p4_1): Adjust attr for V8HFmode to
align with V8HImode.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr102811-2.c: New test.
* gcc.target/i386/avx512vl-vcvtps2ph-pr102811.c: Add new
scan-assembler-times.
Diffstat (limited to 'gcc/c')
0 files changed, 0 insertions, 0 deletions