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| author | Richard Sandiford <richard.sandiford@arm.com> | 2023-12-10 19:46:07 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-12-10 19:46:06 +0000 |
| commit | b3aed459634654d295a1d00e6c149565ced7a9a2 (patch) | |
| tree | f0145da419e66fdd18d01560d6414a74c098fc98 /gcc/c | |
| parent | f5c8d6bc050a8a6120aff2be25b6892d91baac99 (diff) | |
| download | gcc-b3aed459634654d295a1d00e6c149565ced7a9a2.zip gcc-b3aed459634654d295a1d00e6c149565ced7a9a2.tar.gz gcc-b3aed459634654d295a1d00e6c149565ced7a9a2.tar.bz2 | |
aarch64: Fix invalid subregs for BE svread/write_za
Multi-register svread_za and svwrite_za are implemented using one
pattern per register count, with the register contents being bitcast
on entry (for writes) or return (for reads). Previously we relied
on subregs for this, with the subreg for reads being handled by
target-independent code. But using subregs isn't correct for many
big-endian cases, where following subreg rules often requires actual
instructions. The semantics are instead supposed to be those of
svreinterpret.
gcc/
PR target/112931
PR target/112933
* config/aarch64/aarch64-protos.h (aarch64_sve_reinterpret): Declare.
* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): New function.
* config/aarch64/aarch64-sve-builtins-sme.cc (svread_za_impl::expand)
(svwrite_za_impl::expand): Use it to cast the SVE register to the
right mode.
Diffstat (limited to 'gcc/c')
0 files changed, 0 insertions, 0 deletions