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| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-12-09 12:06:29 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-12-11 15:56:21 +0800 |
| commit | 7e854b58084c131fceca9e8fa9dcc7469972e69d (patch) | |
| tree | d473b027d5e59baaf0ac54317c86d716d0594e64 /gcc/c/c-tree.h | |
| parent | 330bb06485b18bae3effe83b45b97dbdcd543367 (diff) | |
| download | gcc-7e854b58084c131fceca9e8fa9dcc7469972e69d.zip gcc-7e854b58084c131fceca9e8fa9dcc7469972e69d.tar.gz gcc-7e854b58084c131fceca9e8fa9dcc7469972e69d.tar.bz2 | |
RISC-V: Support highest overlap for wv instructions
According to RVV ISA, we can allow vwadd.wv v2, v2, v3 overlap.
Before this patch:
nop
vsetivli zero,4,e8,m4,tu,ma
vle16.v v8,0(a0)
vmv8r.v v0,v8
vwsub.wv v0,v8,v12
nop
addi a4,a0,100
vle16.v v8,0(a4)
vmv8r.v v24,v8
vwsub.wv v24,v8,v12
nop
addi a4,a0,200
vle16.v v8,0(a4)
vmv8r.v v16,v8
vwsub.wv v16,v8,v12
nop
After this patch:
nop
vsetivli zero,4,e8,m4,tu,ma
vle16.v v0,0(a0)
vwsub.wv v0,v0,v4
nop
addi a4,a0,100
vle16.v v24,0(a4)
vwsub.wv v24,v24,v28
nop
addi a4,a0,200
vle16.v v16,0(a4)
vwsub.wv v16,v16,v20
PR target/112431
gcc/ChangeLog:
* config/riscv/vector.md: Support highest overlap for wv instructions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr112431-39.c: New test.
* gcc.target/riscv/rvv/base/pr112431-40.c: New test.
* gcc.target/riscv/rvv/base/pr112431-41.c: New test.
Diffstat (limited to 'gcc/c/c-tree.h')
0 files changed, 0 insertions, 0 deletions