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| author | liuhongt <hongtao.liu@intel.com> | 2021-11-26 23:24:20 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2021-11-29 17:45:57 +0800 |
| commit | 9519b694afbf9a35c36cf9f14d35d1c0e9e8cacc (patch) | |
| tree | 748cba18ee37cbaa0c46cc3407bd9fa6a53605ad /gcc/c/c-parser.c | |
| parent | 85e91ad55a69282c1b0e34569836a026a1a954d1 (diff) | |
| download | gcc-9519b694afbf9a35c36cf9f14d35d1c0e9e8cacc.zip gcc-9519b694afbf9a35c36cf9f14d35d1c0e9e8cacc.tar.gz gcc-9519b694afbf9a35c36cf9f14d35d1c0e9e8cacc.tar.bz2 | |
Fix regression introduced by r12-5536.
There're several failures:
1. unsupported instruction `pextrw` for "pextrw $0, %xmm31, 16(%rax)"
%vpextrw should be used in output templates.
2. ICE in get_attr_memory for movhi_internal since some alternatives
are marked as TYPE_SSELOG.
use TYPE_SSELOG1 instead.
Also this patch fixs a typo and some latent bugs which are related to
moving HImode from/to sse register w/o TARGET_AVX512FP16.
gcc/ChangeLog:
PR target/102811
PR target/103463
* config/i386/i386.c (ix86_secondary_reload): Without
TARGET_SSE4_1, General register is needed to move HImode from
sse register to memory.
* config/i386/sse.md (*vec_extrachf): Use %vpextrw instead of
pextrw in output templates.
* config/i386/i386.md (movhi_internal): Ditto, also fix typo of
MEM_P (operands[1]) and adjust mode/prefix/type attribute for
alternatives related to sse register.
Diffstat (limited to 'gcc/c/c-parser.c')
0 files changed, 0 insertions, 0 deletions