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| author | Wilco Dijkstra <wdijkstr@arm.com> | 2016-11-14 12:04:11 +0000 |
|---|---|---|
| committer | Wilco Dijkstra <wilco@gcc.gnu.org> | 2016-11-14 12:04:11 +0000 |
| commit | 94f7a25eebd2599175e838f09afe7daf59c3e9c1 (patch) | |
| tree | eca04d4b1cbbe6ffebe929492cd138db82149f13 /gcc/c/c-parser.c | |
| parent | db4a1c18ceb5aede224c92ec4c86723f6fb93514 (diff) | |
| download | gcc-94f7a25eebd2599175e838f09afe7daf59c3e9c1.zip gcc-94f7a25eebd2599175e838f09afe7daf59c3e9c1.tar.gz gcc-94f7a25eebd2599175e838f09afe7daf59c3e9c1.tar.bz2 | |
Currently the SBFM, UBFM and BFM instructions all use the attribute "bfm".
SBFM and UBFM include all shifts on AArch64, which are simpler than bitfield
insert. Add a new bfx attribute for these instructions so that they can be
modelled more accurately in the future. There is no difference in code
generation.
* config/aarch64/aarch64.md (aarch64_ashl_sisd_or_int_<mode>3)
Use bfx attribute.
(aarch64_lshr_sisd_or_int_<mode>3): Likewise.
(aarch64_ashr_sisd_or_int_<mode>3): Likewise.
(<optab>si3_insn_uxtw): Likewise.
(<optab><mode>3_insn): Likewise.
(<ANY_EXTEND:optab><GPI:mode>_ashl<SHORT:mode>): Likewise.
(zero_extend<GPI:mode>_lshr<SHORT:mode>): Likewise.
(extend<GPI:mode>_ashr<SHORT:mode>): Likewise.
(<optab><mode>): Likewise.
(insv<mode>): Likewise.
(andim_ashift<mode>_bfiz): Likewise.
* config/aarch64/thunderx.md (thunderx_shift): Add bfx.
* config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.
* config/arm/cortex-a57.md (cortex_a57_alu): Add bfx.
* config/arm/exynos-m1.md (exynos_m1_alu): Add bfx.
(exynos_m1_alu_p): Likewise.
* config/arm/types.md: Add bfx.
* config/arm/xgene1.md (xgene1_bfm): Add bfx.
From-SVN: r242384
Diffstat (limited to 'gcc/c/c-parser.c')
0 files changed, 0 insertions, 0 deletions