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| author | Richard Sandiford <richard.sandiford@arm.com> | 2022-02-09 16:57:06 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2022-02-09 16:57:06 +0000 |
| commit | 83d7e720cd1d075312e798c4ebd2e093f03465fb (patch) | |
| tree | b91aafa3db7e5a166597b5b79e4f409d49a144a4 /gcc/c/c-fold.cc | |
| parent | bce43c0493f65d2589776f0dafa396d5477a84c7 (diff) | |
| download | gcc-83d7e720cd1d075312e798c4ebd2e093f03465fb.zip gcc-83d7e720cd1d075312e798c4ebd2e093f03465fb.tar.gz gcc-83d7e720cd1d075312e798c4ebd2e093f03465fb.tar.bz2 | |
aarch64: Extend vec_concat patterns to 8-byte vectors
This patch extends the previous support for 16-byte vec_concat
so that it supports pairs of 4-byte elements. This too isn't
strictly a regression fix, since the 8-byte forms weren't affected
by the same problems as the 16-byte forms, but it leaves things in
a more consistent state.
gcc/
* config/aarch64/iterators.md (VDCSIF): New mode iterator.
(VDBL): Handle SF.
(single_wx, single_type, single_dtype, dblq): New mode attributes.
* config/aarch64/aarch64-simd.md (load_pair_lanes<mode>): Extend
from VDC to VDCSIF.
(store_pair_lanes<mode>): Likewise.
(*aarch64_combine_internal<mode>): Likewise.
(*aarch64_combine_internal_be<mode>): Likewise.
(*aarch64_combinez<mode>): Likewise.
(*aarch64_combinez_be<mode>): Likewise.
* config/aarch64/aarch64.cc (aarch64_classify_address): Handle
8-byte modes for ADDR_QUERY_LDP_STP_N.
(aarch64_print_operand): Likewise for %y.
gcc/testsuite/
* gcc.target/aarch64/vec-init-13.c: New test.
* gcc.target/aarch64/vec-init-14.c: Likewise.
* gcc.target/aarch64/vec-init-15.c: Likewise.
* gcc.target/aarch64/vec-init-16.c: Likewise.
* gcc.target/aarch64/vec-init-17.c: Likewise.
Diffstat (limited to 'gcc/c/c-fold.cc')
0 files changed, 0 insertions, 0 deletions