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| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-12-20 14:50:11 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-12-21 07:05:57 +0800 |
| commit | d82bb518fa372cc30cc3352e0a124d0bd6deb36f (patch) | |
| tree | fbb59936c8cc4e23ef21317f5775847af9ef38b2 /gcc/c/c-decl.cc | |
| parent | d7e9ae4fa94afd5517536b4dfc7d6be0b3e8c2c3 (diff) | |
| download | gcc-d82bb518fa372cc30cc3352e0a124d0bd6deb36f.zip gcc-d82bb518fa372cc30cc3352e0a124d0bd6deb36f.tar.gz gcc-d82bb518fa372cc30cc3352e0a124d0bd6deb36f.tar.bz2 | |
RISC-V: Fix bug of VSETVL fusion
This patch fixes bugs in the fusion of this following case:
li a5,-1
vmv.s.x v0,a5 -> demand any non-zero AVL
vsetvli a5, ...
Incorrect fusion after VSETVL PASS:
li a5,-1
vsetvli a5...
vmv.s.x v0, a5 --> a5 is modified as incorrect value.
We disallow this incorrect fusion above.
Full coverage testing of RV64 and RV32 no regression.
PR target/113087
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc: Disallow fusion when VL modification pollutes non AVL use.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/pr113087-1.c: New test.
Diffstat (limited to 'gcc/c/c-decl.cc')
0 files changed, 0 insertions, 0 deletions