riscv: Synthesize all 11-bit-rotate constants with rori

Some constants can be built up using LI+RORI instructions.
The current implementation requires one of the upper 32-bits
to be a zero bit, which is not neccesary.
Let's drop this requirement in order to be able to synthesize
a constant like 0xffffffff00ffffffL.

The tests for LI+RORI are made more strict to detect regression
in the calculation of the LI constant and the rotation amount.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_build_integer_1): Don't
	require one zero bit in the upper 32 bits for LI+RORI synthesis.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/xtheadbb-li-rotr.c: New tests.
	* gcc.target/riscv/zbb-li-rotr.c: Likewise.

0 files changed, 0 insertions, 0 deletions