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authorJuzhe-Zhong <juzhe.zhong@rivai.ai>2023-12-20 14:55:26 +0800
committerPan Li <pan2.li@intel.com>2023-12-21 07:06:12 +0800
commit008b80e42eb7cb55c6a2ef55728241b8733dfd17 (patch)
treebb3a4cf1b625b83cd8ff92b4a966a0f44ca47772 /gcc/c-family
parentd82bb518fa372cc30cc3352e0a124d0bd6deb36f (diff)
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RISC-V: Optimize SELECT_VL codegen when length is known as smaller than VF
While trying to fix bugs of PR113097, notice this following situation we generate redundant vsetvli _255 = SELECT_VL (3, POLY_INT_CST [4, 4]); COND_LEN (..., _255) Before this patch: vsetivli a5, 3... ... vadd.vv (use a5) After this patch: ... vadd.vv (use AVL = 3) The reason we can do this is because known_ge (3, [4,4]) is true. It's safe to apply such optimization Tested on both RV32 and RV64 full coverage testing, no regression. PR target/113087 gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_select_vl): Optimize SELECT_VL. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr113087-2.c: New test.
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