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| author | Richard Sandiford <richard.sandiford@arm.com> | 2019-08-14 08:58:40 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2019-08-14 08:58:40 +0000 |
| commit | a229966c9c76afe0cf18c566a3c13ddde3878288 (patch) | |
| tree | 36e43f5e15e510d575e2979b9a8436c4e5950ea7 /gcc/builtins.c | |
| parent | 917d611c56a58c38f2b6a7ba808d7a7ae7ed145c (diff) | |
| download | gcc-a229966c9c76afe0cf18c566a3c13ddde3878288.zip gcc-a229966c9c76afe0cf18c566a3c13ddde3878288.tar.gz gcc-a229966c9c76afe0cf18c566a3c13ddde3878288.tar.bz2 | |
[AArch64] Use SVE ADR to optimise shift-add sequences
This patch uses SVE ADR to optimise shift-and-add and uxtw-and-add
sequences.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/predicates.md (const_1_to_3_operand): New predicate.
* config/aarch64/aarch64-sve.md (*aarch64_adr_uxtw)
(*aarch64_adr<mode>_shift, *aarch64_adr_shift_uxtw): New patterns.
gcc/testsuite/
* gcc.target/aarch64/sve/adr_1.c: New test.
* gcc.target/aarch64/sve/adr_1_run.c: Likewise.
* gcc.target/aarch64/sve/adr_2.c: Likewise.
* gcc.target/aarch64/sve/adr_2_run.c: Likewise.
* gcc.target/aarch64/sve/adr_3.c: Likewise.
* gcc.target/aarch64/sve/adr_3_run.c: Likewise.
* gcc.target/aarch64/sve/adr_4.c: Likewise.
* gcc.target/aarch64/sve/adr_4_run.c: Likewise.
* gcc.target/aarch64/sve/adr_5.c: Likewise.
* gcc.target/aarch64/sve/adr_5_run.c: Likewise.
From-SVN: r274436
Diffstat (limited to 'gcc/builtins.c')
0 files changed, 0 insertions, 0 deletions