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| author | Richard Earnshaw <rearnsha@arm.com> | 2019-08-22 14:40:52 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2019-08-22 14:40:52 +0000 |
| commit | 203ef022c6a0477c33a8cf4a65890e33d0912cf0 (patch) | |
| tree | 8b499ff0e85de91c9b460c2571a1f9d0f2240fa0 /gcc/builtins.c | |
| parent | 391625888d4d97f9016ab9ac04acc55d81f0c26f (diff) | |
| download | gcc-203ef022c6a0477c33a8cf4a65890e33d0912cf0.zip gcc-203ef022c6a0477c33a8cf4a65890e33d0912cf0.tar.gz gcc-203ef022c6a0477c33a8cf4a65890e33d0912cf0.tar.bz2 | |
[Arm] Add 16-bit thumb alternatives to iorsi3_compare0[_scratch]
The iorsi3_compare0 and iorsi3_compare0_scratch patterns can make use
of the 16-bit thumb orrs instruction if suitable registers are
allocated. This patch adds the alternative to allow this to happen.
* config/arm/arm.md (iorsi3_compare0): Add alternative for 16-bit thumb
insn.
(iorsi3_compare0_scratch): Likewise.
From-SVN: r274822
Diffstat (limited to 'gcc/builtins.c')
0 files changed, 0 insertions, 0 deletions