aboutsummaryrefslogtreecommitdiff
path: root/gcc/asan.c
diff options
context:
space:
mode:
authorLin Zuojian <manjian2006@gmail.com>2014-04-22 05:55:40 +0000
committerJakub Jelinek <jakub@gcc.gnu.org>2014-04-22 07:55:40 +0200
commite5dcd6954a1b6236e0d37d2a8fb31a13c25150ad (patch)
tree36352461df132eef6f972e42a369651f69061d37 /gcc/asan.c
parentf8c503f0941a59fb27677b017b727a55a247e915 (diff)
downloadgcc-e5dcd6954a1b6236e0d37d2a8fb31a13c25150ad.zip
gcc-e5dcd6954a1b6236e0d37d2a8fb31a13c25150ad.tar.gz
gcc-e5dcd6954a1b6236e0d37d2a8fb31a13c25150ad.tar.bz2
re PR middle-end/60281 (Address Sanitizer triggers alignment fault in ARM machines)
PR middle-end/60281 * asan.c (asan_emit_stack_protection): Force the base to align to appropriate bits if STRICT_ALIGNMENT. Set shadow_mem align to appropriate bits if STRICT_ALIGNMENT. * cfgexpand.c (expand_stack_vars): Set base_align appropriately when asan is on. (expand_used_vars): Leave a space in the stack frame for alignment if STRICT_ALIGNMENT. From-SVN: r209554
Diffstat (limited to 'gcc/asan.c')
-rw-r--r--gcc/asan.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/gcc/asan.c b/gcc/asan.c
index 9f29807..d7c282e 100644
--- a/gcc/asan.c
+++ b/gcc/asan.c
@@ -1017,8 +1017,17 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb,
base_align_bias = ((asan_frame_size + alignb - 1)
& ~(alignb - HOST_WIDE_INT_1)) - asan_frame_size;
}
+ /* Align base if target is STRICT_ALIGNMENT. */
+ if (STRICT_ALIGNMENT)
+ base = expand_binop (Pmode, and_optab, base,
+ gen_int_mode (-((GET_MODE_ALIGNMENT (SImode)
+ << ASAN_SHADOW_SHIFT)
+ / BITS_PER_UNIT), Pmode), NULL_RTX,
+ 1, OPTAB_DIRECT);
+
if (use_after_return_class == -1 && pbase)
emit_move_insn (pbase, base);
+
base = expand_binop (Pmode, add_optab, base,
gen_int_mode (base_offset - base_align_bias, Pmode),
NULL_RTX, 1, OPTAB_DIRECT);
@@ -1097,6 +1106,8 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb,
&& (ASAN_RED_ZONE_SIZE >> ASAN_SHADOW_SHIFT) == 4);
shadow_mem = gen_rtx_MEM (SImode, shadow_base);
set_mem_alias_set (shadow_mem, asan_shadow_set);
+ if (STRICT_ALIGNMENT)
+ set_mem_align (shadow_mem, (GET_MODE_ALIGNMENT (SImode)));
prev_offset = base_offset;
for (l = length; l; l -= 2)
{
@@ -1186,6 +1197,10 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb,
shadow_mem = gen_rtx_MEM (BLKmode, shadow_base);
set_mem_alias_set (shadow_mem, asan_shadow_set);
+
+ if (STRICT_ALIGNMENT)
+ set_mem_align (shadow_mem, (GET_MODE_ALIGNMENT (SImode)));
+
prev_offset = base_offset;
last_offset = base_offset;
last_size = 0;