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author | Pan Li <pan2.li@intel.com> | 2023-05-31 14:49:32 +0800 |
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committer | Pan Li <pan2.li@intel.com> | 2023-05-31 15:25:46 +0800 |
commit | 5a98afec536ccc8e4530575edc5cf3420a4416b3 (patch) | |
tree | c0675ccefceb16076422586d9e7be904bebdc73a /gcc/alias.cc | |
parent | fefa7db2c31fee449dd46dd6ed7f5a39fa884038 (diff) | |
download | gcc-5a98afec536ccc8e4530575edc5cf3420a4416b3.zip gcc-5a98afec536ccc8e4530575edc5cf3420a4416b3.tar.gz gcc-5a98afec536ccc8e4530575edc5cf3420a4416b3.tar.bz2 |
RISC-V: Add ZVFH extension to the -march= option
This patch would like to add new sub extension (aka ZVFH) to the -march= option.
To make it simple, only the sub extension itself is involved in this patch, and
the underlying FP16 related RVV intrinsic API depends on the TARGET_ZVFH.
The Zvfh extension depends on the Zve32f and Zfhmin extensions. You can locate
more information about ZVFH from below spec doc.
https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#185-zvfh-vector-extension-for-half-precision-floating-point
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc:
(riscv_implied_info): Add zvfh item.
(riscv_ext_version_table): Ditto.
(riscv_ext_flag_table): Ditto.
* config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
(TARGET_ZVFH): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-21.c: New test.
* gcc.target/riscv/predef-27.c: New test.
Diffstat (limited to 'gcc/alias.cc')
0 files changed, 0 insertions, 0 deletions