diff options
author | Roger Sayle <roger@nextmovesoftware.com> | 2022-07-05 18:06:13 +0100 |
---|---|---|
committer | Roger Sayle <roger@nextmovesoftware.com> | 2022-07-05 18:06:13 +0100 |
commit | c73e8d45ca0111f51d7187641963df97f5c9c63f (patch) | |
tree | 7d8ae0764e0b46a32a6444af40917e7e457206f4 /gcc/ada | |
parent | 02e2e15ec4b610c0f5c73e1db424b1bbc65dd39a (diff) | |
download | gcc-c73e8d45ca0111f51d7187641963df97f5c9c63f.zip gcc-c73e8d45ca0111f51d7187641963df97f5c9c63f.tar.gz gcc-c73e8d45ca0111f51d7187641963df97f5c9c63f.tar.bz2 |
Doubleword version of and;cmp to not;test optimization on x86.
This patch extends the earlier and;cmp to not;test optimization to also
perform this transformation for TImode on TARGET_64BIT and DImode on -m32,
One motivation for this is that it's a step to fixing the current failure
of gcc.target/i386/pr65105-5.c on -m32.
A more direct benefit for x86_64 is that the following code:
int foo(__int128 x, __int128 y)
{
return (x & y) == y;
}
improves with -O2 from 15 instructions:
movq %rdi, %r8
movq %rsi, %rax
movq %rax, %rdi
movq %r8, %rsi
movq %rdx, %r8
andq %rdx, %rsi
andq %rcx, %rdi
movq %rsi, %rax
movq %rdi, %rdx
xorq %r8, %rax
xorq %rcx, %rdx
orq %rdx, %rax
sete %al
movzbl %al, %eax
ret
to the slightly better 13 instructions:
movq %rdi, %r8
movq %rsi, %rax
movq %r8, %rsi
movq %rax, %rdi
notq %rsi
notq %rdi
andq %rdx, %rsi
andq %rcx, %rdi
movq %rsi, %rax
orq %rdi, %rax
sete %al
movzbl %al, %eax
ret
2022-07-05 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386.cc (ix86_rtx_costs) <COMPARE>: Provide costs
for double word comparisons and tests (comparisons against zero).
* config/i386/i386.md (*test<mode>_not_doubleword): Split DWI
and;cmp into andn;cmp $0 as a pre-reload splitter.
(*andn<dwi>3_doubleword_bmi): Use <dwi> instead of <mode> in name.
(*<any_or><dwi>3_doubleword): Likewise.
gcc/testsuite/ChangeLog
* gcc.target/i386/testnot-3.c: New test case.
Diffstat (limited to 'gcc/ada')
0 files changed, 0 insertions, 0 deletions