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| author | Tamar Christina <tamar.christina@arm.com> | 2021-10-25 15:14:04 +0100 |
|---|---|---|
| committer | Tamar Christina <tamar.christina@arm.com> | 2021-10-25 15:14:04 +0100 |
| commit | 2cbfaba60661ebbdfcffe725ab55fbb323e2a187 (patch) | |
| tree | b70bb8900c7efaf39e948a1b8a0de1ea7124d06f /gcc/ada | |
| parent | f217e87972a2a207e793101fc05cfc9dd095c678 (diff) | |
| download | gcc-2cbfaba60661ebbdfcffe725ab55fbb323e2a187.zip gcc-2cbfaba60661ebbdfcffe725ab55fbb323e2a187.tar.gz gcc-2cbfaba60661ebbdfcffe725ab55fbb323e2a187.tar.bz2 | |
AArch64 testsuite: Force shrn-combine-*.c to use NEON.
These tests are testing Advanced SIMD codegen, so if the compiler or the
testsuite is forcing SVE they will fail.
This adds +nosve so that we always generate Advanced SIMD codegen.
gcc/testsuite/ChangeLog:
PR target/102907
* gcc.target/aarch64/shrn-combine-1.c: Disable SVE.
* gcc.target/aarch64/shrn-combine-2.c: Likewise.
* gcc.target/aarch64/shrn-combine-3.c: Likewise.
* gcc.target/aarch64/shrn-combine-4.c: Likewise.
* gcc.target/aarch64/shrn-combine-5.c: Likewise.
* gcc.target/aarch64/shrn-combine-6.c: Likewise.
* gcc.target/aarch64/shrn-combine-7.c: Likewise.
Diffstat (limited to 'gcc/ada')
0 files changed, 0 insertions, 0 deletions