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author | YunQiang Su <syq@gcc.gnu.org> | 2024-04-29 00:33:44 +0800 |
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committer | YunQiang Su <syq@debian.org> | 2024-05-06 12:10:08 +0800 |
commit | 7d5d2b879ae7636ca118fb4f3a08b22705cdeacb (patch) | |
tree | 8cd054b225ca262d07690118fb86996a8c34ee15 /gcc/ada/inline.adb | |
parent | 70d30dd656957f518b8169a125f6b17f53da8237 (diff) | |
download | gcc-7d5d2b879ae7636ca118fb4f3a08b22705cdeacb.zip gcc-7d5d2b879ae7636ca118fb4f3a08b22705cdeacb.tar.gz gcc-7d5d2b879ae7636ca118fb4f3a08b22705cdeacb.tar.bz2 |
expmed: TRUNCATE value1 if needed in store_bit_field_using_insv
PR target/113179.
In `store_bit_field_using_insv`, we just use SUBREG if value_mode
>= op_mode, while in some ports, a sign_extend will be needed,
such as MIPS64:
If either GPR rs or GPR rt does not contain sign-extended 32-bit
values (bits 63..31 equal), then the result of the operation is
UNPREDICTABLE.
The problem happens for the code like:
struct xx {
int a:4;
int b:24;
int c:3;
int d:1;
};
void xx (struct xx *a, long long b) {
a->d = b;
}
In the above code, the hard register contains `b`, may be note well
sign-extended.
gcc/
PR target/113179
* expmed.cc(store_bit_field_using_insv): TRUNCATE value1 if
needed.
gcc/testsuite
PR target/113179
* gcc.target/mips/pr113179.c: New tests.
Diffstat (limited to 'gcc/ada/inline.adb')
0 files changed, 0 insertions, 0 deletions