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| author | Richard Earnshaw <rearnsha@arm.com> | 2022-05-11 13:08:40 +0100 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2022-05-13 11:24:11 +0100 |
| commit | 6a116728e27c4da65d84483c0e75561a7479d4d5 (patch) | |
| tree | 7b3bcb83740b80580ed11c30c19e631ffac8dc77 /gcc/ada/gcc-interface | |
| parent | 485a0ae0982abe8ccebdfd660aa45823a572714d (diff) | |
| download | gcc-6a116728e27c4da65d84483c0e75561a7479d4d5.zip gcc-6a116728e27c4da65d84483c0e75561a7479d4d5.tar.gz gcc-6a116728e27c4da65d84483c0e75561a7479d4d5.tar.bz2 | |
arm: correctly handle misaligned MEMs on MVE [PR105463]
Vector operations in MVE must be aligned to the element size, so if we
are asked for a misaligned move in a wider mode we must recast it to a
form suitable for the known alignment (larger elements have better
address offset ranges, so there is some advantage to using wider
element sizes if possible). Whilst fixing this, also rework the
predicates used for validating operands - the Neon predicates are
not right for MVE.
gcc/ChangeLog:
PR target/105463
* config/arm/mve.md (*movmisalign<mode>_mve_store): Use
mve_memory_operand.
(*movmisalign<mode>_mve_load): Likewise.
* config/arm/vec-common.md (movmisalign<mode>): Convert to generator
form...
(@movmisalign<mode>): ... thus. Use generic predicates and then
rework operands if they are not valid. For MVE rework to a
narrower element size if the alignment is not high enough.
Diffstat (limited to 'gcc/ada/gcc-interface')
0 files changed, 0 insertions, 0 deletions