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authorKyrylo Tkachov <kyrylo.tkachov@arm.com>2023-04-18 12:06:49 +0100
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>2023-04-18 12:06:49 +0100
commit2d70f3213fe4e76722cd55e48f8eb0820c56ec7a (patch)
treeae6533de43e91c825f161294bc84ea63c9d593e4 /gcc/ada/gcc-interface/utils.cc
parent4204ed2dc74390ab3689d1d6a53001761338baf6 (diff)
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aarch64: Add QI -> HI zero-extension for LDAPR
This patch is a straightforward extension of the zero-extending LDAPR pattern to represent QI -> HI load-extends. This maps down to a LDAPRB-W instruction. This lets us remove a redundant zero-extend in the new test function. Bootstrapped and tested on aarch64-none-linux-gnu. gcc/ChangeLog: * config/aarch64/atomics.md (*aarch64_atomic_load<ALLX:mode>_rcpc_zext): Use SD_HSDI for destination mode iterator. gcc/testsuite/ChangeLog: * gcc.target/aarch64/ldapr-zext.c: Add test for u8 to u16 extension.
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